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The Principal Software Engineer will design, develop, and lead the architecture of embedded wireless firmware for IoT products, focusing on ULP solutions. Responsibilities include developing drivers, collaborating with a global team, and ensuring timely delivery of high-quality products.

The Principal PHY/MAC RTL Design Engineer will be responsible for implementing MAC and PHY algorithms for low power IoT connectivity devices, developing specifications, creating micro-architecture in Verilog/Systemverilog, verifying designs, and collaborating with cross-functional teams.

The PHY Design Engineer will design low-power communication systems and develop micro-architecture and SystemVerilog RTL. Responsibilities include collaborating on product specifications, design verification, identifying bottlenecks, and providing guidance to teams on physical design and timing closure.

As a PHY Verification Engineer/Lead at InnoPhase IoT, you will define and develop UVM testbenches for wireless PHY and MAC layers, collaborating with design and system engineers. Responsibilities include optimizing test plans, conducting verification coverage analysis, running regressions, and refining verification tools. Your role also involves debugging and problem-solving in a team environment.

As a PHY Design Engineer/Lead, you will be responsible for developing low-power WiFi and BT/BLE micro-architecture and RTL design. You will work on digital signal processing engines, analyze design bottlenecks, and collaborate with verification teams on test plans and design tools.

The Staff/Sr. Staff Engineer, RF PLL Design will lead the development of custom RF, analog, and mixed signal IPs. Responsibilities include hands-on design of high-performance RF synthesizers, supervising layout activities, collaborating with cross-functional teams, and presenting findings to management. The role also involves validating methods to alleviate circuit impairments and participating in post-silicon performance characterization.

The Principal Engineer will lead the development of RF, analog, and mixed signal IPs for SoC products. Responsibilities include designing RF frequency synthesizers, supervising layout activities, collaborating with cross-functional teams, conducting simulations, and aiding in test plan design and validation.