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As a Product Engineer 2 at Cadence, you will design, develop, and troubleshoot software for advanced chip design platforms while supporting customers in successful tapeouts of their System-on-chip designs. You'll work in a dynamic environment, collaborating with R&D and Customer Engagement teams.

As a Principal Application Engineer at Cadence, you will work directly with semiconductor and system companies to deploy Cadence's verification platforms. Your responsibilities include developing customer-specific verification requirements, supporting technical evaluations, conducting technical presentations, and enhancing customer success. Ideal candidates should have a degree in Computer Science/Engineering, experience in SystemVerilog, VHDL, Verilog, UVM, Perl, Python, Tcl, strong communication skills, and the ability to work effectively with customers and R&D teams.

The 3DIC Solutions Architect Engineer will design and develop IC and 3DIC solutions, managing the entire product lifecycle from planning to production, ensuring integration across chip, package, and system designs while performing multi-physics analyses.

The Design Engineering Architect will lead the DFT team from RTL to GDSII to Silicon Debug, focusing on DFT strategies like scan chain insertion and ATPG. They will debug failures, verify testbenches, and work collaboratively with cross-functional teams, ensuring quality and thoroughness in problem solving.

The Principal Hardware Design Engineer is responsible for the design, bring-up, and sustainability of hardware system platforms. This role involves leading design reviews, maintaining engineering standards, and providing technical guidance to junior engineers while ensuring compliance with electrical engineering principles.

As a Principal Product Engineer at Cadence, you'll engage with customers to address their verification challenges, collaborate with development teams to enhance verification flows, and contribute to strategy and technology roadmaps for the Verisium Debug product. You'll also deliver training and educate teams on new methodologies.

The Principal Product Engineer at Cadence will lead customer engagements to address verification challenges, develop key verification flows, and collaborate with development teams to ensure alignment with customer requirements. Responsibilities include educating the field about new solutions and creating strategic roadmaps for product engineering.