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Yesterday
Santa Clara, CA, USA
148 Employees
Senior level
148 Employees
Senior level
Big Data • Information Technology
As a Signal/Power Integrity Engineer, you will be responsible for SI planning, design, modeling, simulation, and lab validation for high-speed connectivity products. The role involves creating validation plans, conducting experiments, analyzing results, and collaborating with internal teams to ensure product robustness.
Yesterday
Santa Clara, CA, USA
148 Employees
Expert/Leader
148 Employees
Expert/Leader
Big Data • Information Technology
As a Principal Physical Design Engineer at Astera Labs, you will oversee the planning and execution of design for connectivity ASICs. Collaborating closely with teams in the design, verification, and engineering operations, you will ensure timing constraints and methodologies are maintained for complex silicon products.
Yesterday
Santa Clara, CA, USA
148 Employees
120K-200K Annually
Junior
148 Employees
120K-200K Annually
Junior
Big Data • Information Technology
As a member of Astera Labs, you will develop diagnostics and manufacturing software for high-speed data center products, focusing on software design, validation, and automation. Responsibilities include creating diagnostic software, supporting hardware validation, coordinating with hardware teams, and mentoring junior members.
Yesterday
Santa Clara, CA, USA
148 Employees
Senior level
148 Employees
Senior level
Big Data • Information Technology
The Principal Product Applications Engineer will support the design and integration of connectivity products with cloud service providers and network OEMs, providing technical guidance, documentation, and feedback for product improvement. Responsibilities include hands-on debugging, product documentation, and collaboration with customers to resolve design challenges.
Yesterday
Santa Clara, CA, USA
148 Employees
Senior level
148 Employees
Senior level
Big Data • Information Technology
The Principal Design Verification Engineer will develop and execute emulation test benches and test plans, manage the emulation life cycle, collaborate with software teams, and utilize coding skills for functional design verification. This role requires strong ASIC verification experience, proficiency in various programming languages, and ability to design comprehensive test methodologies.
Yesterday
Santa Clara, CA, USA
148 Employees
Expert/Leader
148 Employees
Expert/Leader
Big Data • Information Technology
As the Senior Principal Product Manager at Astera Labs, you will lead product definition and launch, driving interactions with engineering teams and customers in the AI semiconductor market. Your role includes developing go-to-market strategies, identifying new markets, and collaborating with senior leaders to ensure customer impact and product success.
Yesterday
Santa Clara, CA, USA
148 Employees
Senior level
148 Employees
Senior level
Big Data • Information Technology
The Principal Product Applications Engineer at Astera Labs will design-in and support Smart Cable Modules for cloud service providers and OEMs. Responsibilities include providing technical guidance, generating product documentation, driving innovation, and resolving design challenges in semiconductor products through customer engagement and in-lab clinical debugging.
Yesterday
Santa Clara, CA, USA
148 Employees
160K-240K Annually
Senior level
148 Employees
160K-240K Annually
Senior level
Big Data • Information Technology
The Principal Supplier Quality Engineer at Astera Labs manages supplier quality escalations, drives resolution for quality challenges, and collaborates with cross-functional teams. This role involves auditing suppliers, ensuring high manufacturing standards, and proactively mitigating supplier-related quality risks, all while maintaining effective communication with customers and stakeholders.
Yesterday
Santa Clara, CA, USA
148 Employees
160K-240K Annually
Senior level
148 Employees
160K-240K Annually
Senior level
Big Data • Information Technology
The Senior Product Manager will manage the product definition and launch of PCIe solutions, collaborating with engineering teams and leading customer discussions. Responsibilities include driving go-to-market strategies and working with senior leadership to impact global operations.
Yesterday
Santa Clara, CA, USA
148 Employees
120K-190K Annually
Senior level
148 Employees
120K-190K Annually
Senior level
Big Data • Information Technology
Architect and develop firmware and microcontroller subsystems for Astera Labs' SoC and systems products. Collaborate with logic designers on HW-SW interfaces, work with high-speed interfaces in Data Center equipment, and engage in customer-facing activities to ensure customer needs are met.
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