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As a Signal and Power Integrity Engineer, you will work on packaging solutions for chiplet interconnects, focusing on design, modeling, and testing. You will collaborate with circuit designers for performance optimization, manage signal integrity simulations, and lead power delivery network designs while handling lab measurements and issues.

The Physical Design Lead will develop innovative methodologies for chiplet design and work collaboratively with engineers to ensure efficiency and correctness in high-speed block implementations. Responsibilities include leading a team, establishing design flows, and automating processes to enhance productivity, while integrating various signal blocks and managing customer-ready products.

As a Digital Design Engineer, you will define and implement RTL for major chiplet blocks, ensuring high quality and supporting verification processes. You will collaborate with a cross-functional team to innovate and develop high-performance, manufacturable products, from design specification to silicon characterization.

As a Senior Analog Design Engineer, you will architect and develop custom analog mixed-signal blocks for high-speed wireline links. You will collaborate with digital teams, validate designs, and oversee junior engineers, ensuring products meet performance standards for chiplet systems.