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19 Days Ago
San Jose, CA, USA
2,298 Employees
108K-158K Annually
Mid level
2,298 Employees
108K-158K Annually
Mid level
Semiconductor
The position involves technical support for Samsung memory products, focusing on troubleshooting system memory failures and validating memory features for server CPUs. Responsibilities include conducting performance evaluations, creating experiments for detecting memory issues, and collaborating with internal teams to improve test methodologies.
19 Days Ago
San Jose, CA, USA
2,298 Employees
161K-257K Annually
Expert/Leader
2,298 Employees
161K-257K Annually
Expert/Leader
Semiconductor
The Senior Manager, Integrated Marketing Communications will lead a marketing communications team, developing and executing strategies to drive awareness for the Samsung Semiconductor business. This role involves collaborating across diverse global teams, ensuring cohesive messaging and strategy, while managing a team of professionals and focusing on customer benefits at various events.
19 Days Ago
San Jose, CA, USA
2,298 Employees
132K-198K Annually
Senior level
2,298 Employees
132K-198K Annually
Senior level
Semiconductor
The role involves collaborating with hardware and software engineers to optimize AI/ML workloads, troubleshoot issues, analyze performance bottlenecks, and contribute to innovative hardware solutions. Candidates will research ML trends and develop scalable systems to enhance performance and efficiency.
19 Days Ago
San Jose, CA, USA
2,298 Employees
162K-258K Annually
Senior level
2,298 Employees
162K-258K Annually
Senior level
Semiconductor
The Senior Manager in Product and Solution Planning will lead memory architecture and planning with partners and customers, focusing on HBM products. Responsibilities include defining product features, communicating product visions, developing plans and roadmaps, and understanding market needs in AI applications. The role requires in-depth knowledge of memory technology and involves 15-20% travel.
19 Days Ago
San Jose, CA, USA
2,298 Employees
177K-283K Annually
Expert/Leader
2,298 Employees
177K-283K Annually
Expert/Leader
Semiconductor
As a Senior DFT Architect at Samsung Semiconductor, you will define DFT architecture for logic and memory products, focusing on yield and quality. Responsibilities include setting KPIs, facilitating failure analysis, and leading technical discussions with customers while managing stakeholder relationships.
19 Days Ago
San Jose, CA, USA
2,298 Employees
177K-283K Annually
Senior level
2,298 Employees
177K-283K Annually
Senior level
Semiconductor
The Senior Staff, AI/ML Platform Architect will be responsible for defining the platform architecture for AI/ML compute in data center applications, managing the technology roadmap, and leading discussions with stakeholders to enhance performance, power, and cost efficiencies in silicon products.
19 Days Ago
San Jose, CA, USA
2,298 Employees
Mid level
2,298 Employees
Mid level
Semiconductor
The Strategic Planning Specialist will shape business strategy, perform data analysis, and align company goals. Responsibilities include market research, supporting executive management activities, collaborating with finance for revenue tracking, and providing creative support for marketing projects.
19 Days Ago
San Jose, CA, USA
2,298 Employees
132K-198K Annually
Senior level
2,298 Employees
132K-198K Annually
Senior level
Semiconductor
The role involves performing complex statistical and data-mining analysis using tools like Python, SQL, and R. Responsibilities include developing analytical models, automating processes, building data visualizations, and collaborating with teams to produce insights for product and service development. Additionally, the candidate is expected to stay updated with industry trends and engage with stakeholders for project goals.
24 Days Ago
San Jose, CA, USA
2,298 Employees
177K-283K Annually
Senior level
2,298 Employees
177K-283K Annually
Senior level
Semiconductor
As a Senior Staff Engineer, you will work on memory fault management systems, focusing on improving the field failure rate of memory subsystems through in-field telemetry analysis, developing fault management modules, and collaborating with stakeholders to define industry standards.
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