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As a Principal DFT Engineer at Astera Labs, you will lead the development of connectivity products, ensuring quality from design to production. This includes collaboration with multiple engineering teams on validation, testing, and analysis of semiconductor solutions.
The Principal Design Verification Engineer will develop and execute verification plans for CXL and PCIe designs, write and execute test sequences, and collaborate with RTL designers to debug issues. Responsibilities also include creating VIP abstraction layers and analyzing coverage data.
Architect and develop firmware and microcontroller subsystems for Astera Labs’ SoC and systems products. Work with logic designers to architect and verify HW-SW interfaces on complex SoCs. Strong background in electrical engineering and experience with high-speed interfaces in Data Center equipment.
As a Quality Engineer at Astera Labs, you will be responsible for quality management across various domains including customer quality, supplier quality, new product development, and regulatory compliance. Strong academic background in electrical engineering is required with skills in data analysis, relationship management, and quality engineering. Preferred experience in Python programming and familiarity with CAD layout tools.
The Senior Field Applications Engineer will support cloud service providers and OEMs by designing solutions with Astera Labs' connectivity products, understanding customer requirements, and coordinating with engineering teams. Responsibilities include hands-on design support, customer interaction, and innovation implementation.
Architect and develop firmware and microcontroller subsystems for SoC and systems products. Responsible for implementing major features. Must work closely with hardware and customers. Strong academic background in electrical engineering required.
Provide technical guidance to customers, generate collateral for products, drive innovation, support semiconductor products design, and address challenges in leading-edge technology.
Design and develop Firmware for enabling technologies like DDR and/or CXL/PCIe for future-looking products. Responsible for implementing major features of products. Requires 5+ years of firmware development experience using C/C++ in embedded environments and 3+ years of DDR training.
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