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2 Days Ago
Toronto, ON, CAN
636 Employees
Senior level
636 Employees
Senior level
Semiconductor
As a Mixed-Signal Engineer in the CTO Office, you'll develop high-performance analog and mixed-signal circuits for next-generation products, particularly focusing on 100+Gbps serial transceivers using advanced CMOS technologies. You'll engage with the CTO and engineering teams, define specifications, drive design and layout, and ensure performance targets are met through collaboration and hands-on experimentation.
2 Days Ago
Bangalore, Bengaluru, Karnataka, IND
636 Employees
Mid level
636 Employees
Mid level
Semiconductor
As a Principal Engineer - RTL Design at Alphawave Semi, you will play a crucial role in advancing data communication technologies across multiple industries, including AI, networking, and autonomous vehicles. Your responsibilities will involve developing innovative designs that meet the challenges of the digital future.
636 Employees
Senior level
Semiconductor
As a Senior Design Verification Engineer, you will develop verification plans, construct testbenches, analyze test failures, and perform behavioral modeling of circuits. You will lead and collaborate with various teams, facilitate compliance testing, and contribute to continuous improvement in verification methodologies.
636 Employees
Senior level
Semiconductor
The Senior/Staff/Principal Product Applications Engineer will provide technical support for customers using Alphawave's DSP chips, ensuring integration into customer designs and working closely with internal teams. Responsibilities include authoring technical documentation and validating product performance, with potential travel required for customer engagement.
2 Days Ago
Toronto, ON, CAN
636 Employees
Senior level
636 Employees
Senior level
Semiconductor
As a Connectivity Systems Engineer, you'll develop next-generation optical and electrical connectivity technologies. Responsibilities include system-level simulations of high-speed electrical and optical links, enhancing simulation platforms, deriving specifications, and collaborating on prototypes. The role supports AI and networking advances, contributing to internal and external presentations.
2 Days Ago
Toronto, ON, CAN
636 Employees
Senior level
636 Employees
Senior level
Semiconductor
The Staff DFT Engineer will develop and support DFT methodologies, automate verification test benches, and build scan insertion flows for SoCs. The role involves architecting integrated RTL-centric DFT environments and ensuring quality control for DFT designs across various complex systems.
2 Days Ago
Toronto, ON, CAN
636 Employees
Senior level
636 Employees
Senior level
Semiconductor
The Principal DFT Engineer will develop and support DFT methodologies and flows across various projects, automate verification test benches, build scan insertion flows, and write timing constraints for Integrated DFT environments.
2 Days Ago
San Jose, CA, USA
636 Employees
175K-195K Annually
Senior level
636 Employees
175K-195K Annually
Senior level
Semiconductor
As the ASIC Program Manager, you will lead the entire product lifecycle for SoC products, from concept to mass production. You'll coordinate customer engagement, manage program timelines, budgets, and risks, ensuring delivery and exceeding customer expectations through tight collaboration with cross-functional teams. Regularly presenting program status to executive management is essential.
2 Days Ago
Israel
636 Employees
Senior level
636 Employees
Senior level
Semiconductor
As a Technology Support Specialist, you will provide technical assistance to employees and customers, troubleshoot hardware, software, and network issues, and install and configure necessary systems. You will create documentation, collaborate with IT staff on complex issues, and assist in system and network maintenance.
2 Days Ago
Toronto, ON, CAN
636 Employees
Mid level
636 Employees
Mid level
Semiconductor
The Project Engineering Manager will lead project schedules, track milestones, and drive new product development in high-speed serdes technology. The role requires collaboration with engineering teams to ensure alignment on scope, schedule, and budget, along with defining efficient processes for project execution.
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