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The Senior Manager, Memory Sales will manage a strategic account in memory and AI/datacenter markets, enhance customer engagement, and collaborate with internal teams to deliver tailored solutions, driven by market expertise and data-driven strategies.

The Manager, NAND/SSD Field Application Engineer will be responsible for managing technical accounts for NAND solutions and maximizing sales contribution.

As a Senior Staff Data Scientist, you will drive the development of forecasting models and fault management strategies for memory subsystems. Collaborating with cross-functional teams, you'll enhance customer experiences through innovative telemetry analysis and predictive algorithms, while also contributing to industry standards and publications.

The role involves performing complex statistical and data-mining analysis using tools like Python, SQL, and R. Responsibilities include developing analytical models, automating processes, building data visualizations, and collaborating with teams to produce insights for product and service development. Additionally, the candidate is expected to stay updated with industry trends and engage with stakeholders for project goals.

As a Manager, NAND/SSD Business Enablement, you'll drive SSD technologies and solutions for assigned accounts, identify design-in opportunities, manage customer relationships, and provide strategic insights to enhance business success.

As a Principal Engineer in the DRAM Design Lab at Samsung, you will develop and optimize DRAM architectures, lead design specifications, and collaborate with cross-functional teams to innovate and enhance next-generation DRAM solutions. Responsibilities include customer interactions, performance analysis, and implementing power reduction techniques while ensuring alignment with product strategies.

The role involves developing and maintaining performance models for CPU cores, analyzing performance characteristics, and collaborating with architects to optimize designs. The engineer will investigate new features, conduct evaluations, and perform trade-off analysis for CPU architectures to meet power, performance, and area targets.