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The Principal Solutions Engineer will develop and optimize functional verification flows for complex SoC designs, manage verification plans, create testbenches, conduct post-silicon validation, and provide technical training. Key responsibilities also include collaboration with different teams to ensure comprehensive feature coverage and analysis of verification metrics.

As a Lead Solutions Engineer at Cadence, you will design SoC IPs, create specifications, develop RTL, conduct simulations, define functional constraints, and mentor junior team members while ensuring projects meet power, performance, and area requirements.

As a Lead Solutions Engineer at Cadence, you will implement SoC designs and perform physical verification, timing analysis, and place and route flows. You'll collaborate with the Front-end team, ensuring design feasibility and providing mentorship to junior team members.

As a Lead Solutions Engineer in Digital Design Verification, you will develop functional verification flows for digital SoC IPs, writing and maintaining verification plans, creating and optimizing testbenches, and ensuring feature coverage while mentoring junior team members.

As a Lead Solutions Engineer, you will implement analog IPs and subsystems, develop specifications, and verify high-speed analog circuits. You will lead design strategies and mentor less experienced engineers while ensuring quality and performance in analog designs.

The Application Engineering Manager will provide technical support in schematic capture, layout, and analog/AMS simulation. Responsibilities include conducting root cause analysis, collaborating with R&D, verifying customer problems, and authoring documentation. Proficiency in TCL and Python for flow development is necessary.

The Solutions Engineer at Cadence will assist customers with their Digital Implementation challenges using Cadence's technology. Responsibilities include driving pre-sales and post-sales activities, collaborating with R&D to develop new technologies, solving complex technical issues related to Timing/Noise/Variation characterization, and automating performance analysis and optimizations.