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The GPU PCIe and Boot Architect will design architecture for boot, PCIe/CXL enumeration, and capability discovery. Responsibilities include creating models for validation, collaborating with global teams, and supporting post-silicon validation activities. Candidates should have experience in production code and knowledge of advanced interconnects, security constructs, and ASIC design.

The Senior SOC Memory Subsystem Architect will develop and optimize memory subsystem architecture for leading-edge SoC systems. Responsibilities include performance modeling, analyzing benchmarks, and collaborating with cross-functional teams to ensure comprehensive solutions.

Develop and ensure functional safety and security compliance for automotive system software. Collaborate with engineers and product owners to meet customer requirements, enforce safety standards, and create solutions for SoC products. Work on scripting, automation, and design for firmware development throughout the product lifecycle.