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The Emulation Engineer will modify RTL to create emulation-friendly wrappers and enhance compile/run times using scripts. They will work on AI-enabling server chipsets and be responsible for the transition of RTL into emulation platforms.
Develop and execute EHS strategies, ensure regulatory compliance, support sustainability initiatives, provide EHS training, manage relationships with regulatory bodies, monitor EHS performance, and manage resources. Based in Bangalore, India.
Implementing DFT / Test on complex IP and SOC for ASIC designs, hands-on experience in DFT implementation, test verification, and pattern generation/simulation.
The Analog IC Design Engineer will design sophisticated CMOS transceiver products, implementing and verifying complex circuits like PLLs, ADCs, and amplifiers. Responsibilities include design verification using industry-standard tools and resolving technical challenges with expert collaborators.
As a Senior Staff Engineer, you will design and implement firmware for high-speed data storage communication and debug issues. You will also perform tests and work closely with customers and teams worldwide to meet their requirements.
The Analog Design Junior role involves working on high-speed and optical transceivers for communication infrastructure. Responsibilities include designing integrated circuits, using CAD tools like Cadence, and gaining experience in analog design and layout techniques while collaborating with a dynamic team.
The Analog Design Engineer will design high-speed optical transceivers, analyze specifications, design at the transistor level, oversee layout, and mentor junior designers. This role requires collaboration across teams, managing tasks from pre-silicon to mass production, and bringing ICs from architecture to volume production.
The Senior Staff Design Engineer will design analog building blocks for Automotive and Ethernet PHY AFE, define specifications, build schematic designs, and collaborate with layout designers for mask design implementation, focusing on high-speed, high-linearity circuit design.
The Senior Engineer, Digital IC Design is responsible for developing behavior models of high-performance SerDes analog circuits for digital and system verification. Duties include creating accurate analog models in SystemVerilog, verifying model accuracy, documenting results, improving methodology, and collaborating with design teams for effective SerDes IP solutions.
As a Senior Engineer in Analog IC Design, you will design and improve transistor level circuits, utilizing CAD tools primarily Cadence. You will perform circuit analysis, simulations, and tests, iterating designs until they meet specifications. Collaboration with team members and attending design meetings is key to resolving issues and enhancing designs.
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