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The Rack Level Integration Engineer will oversee the selection, qualification, and integration of components within data center racks, including servers, networking equipment, and cooling solutions. Responsibilities include managing water cooling systems, hands-on lab setup, and documenting integration processes while collaborating with cross-functional teams for optimal performance.

As a Software Engineer focusing on Infrastructure Performance, you'll design and write software for ASICs, ensuring CI tests run efficiently, scoping tools, and provisioning new servers. You'll automate IT processes and improve performance for upcoming chips while collaborating with the IT team on networking and setup.

The Firmware Engineer will develop and optimize firmware for high-speed interface IPs like PCIe and HBM, conduct debugging and validation in simulation and silicon environments, collaborate with hardware engineers, and propose enhancements for future interface generations.

As an RTL Design Engineer at Etched, you will develop and implement design verification strategies for AI chips, ensuring correct and efficient operation. You will work with high-speed digital logic and contribute to projects involving floating-point math computation and timing constraints, while also learning about modern AI architectures.

As a Procurement professional at Etched, you will manage vendor relationships, expedite purchasing processes, and ensure timely materials delivery for production. You'll create systems for tracking orders, negotiate contracts, and evaluate suppliers to optimize the procurement function.

The Firmware Engineer will design, implement, and optimize firmware for AI accelerator systems, conduct debugging and validation in various environments, and collaborate with hardware engineers to enhance performance. Key responsibilities include firmware development for RTOS embedded systems and proposing improvements for future AI accelerator generations.

The Principal Design Verification Engineer will develop ASIC testbenches, implement micro-architecture using System Verilog, and collaborate with design teams to ensure microchip functionality. Responsibilities include executing functional verification, applying timing closure methods, utilizing formal verification tools, debugging designs, and documenting the verification process.