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The Administrative Assistant supports the executive management team with tasks like scheduling, travel arrangements, and expense reports. Additionally, this role involves office management duties, such as organizing events and greeting visitors, while also assisting in recruitment activities with the Head of Talent.

The Photonics Layout Engineer will be an essential member of the Physical Design team, focusing on the layout of Silicon Photonic chips. Responsibilities include contributing to the design and verification of Photonic ICs, collaborating with various teams to ensure product performance, and optimizing layout processes using specific design tools.

The SI/PI Engineer at Celestial AI will develop and validate energy-efficient AI compute and photonic data transmission solutions. This role involves optimizing performance in VLSI, RF, and Optical Networking through simulations, PCB design reviews, and resolving SI/PI issues during manufacturing. Strong project management and communication skills are required.

The Principal Engineer will drive AI product development from concept to high volume manufacturing, focusing on 2.5D and 3D packaging technologies. Responsibilities include managing assembly processes, qualification of packaging, and collaborating with foundries and OSATs, while managing risks and ensuring design for manufacturing.

The Senior ASIC/VLSI Synthesis and Design Engineer will develop complex digital designs for high-performance ASICs/SoCs. Responsibilities include optimizing design for power, performance, and area, performing timing closure, gate level simulation, and power analysis, and collaborating with design teams. The candidate will also implement DFT flows and address design issues through various methodologies.

The RTL Design Engineer will design and implement custom RTL modules for the Celestial SoC, focusing on low power consumption and high-quality reusable designs. Responsibilities include authoring design specifications, collaborating with DV engineers, evaluating performance tradeoffs, and driving coverage closure for designs.

The AMS Design Engineer will develop high-speed analog architecture tailored for AI applications. Responsibilities include top-down analysis of AMS systems, designing low-power analog circuits, defining specifications, and collaborating with multiple engineers.