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The Silicon Verification Engineer is responsible for verification activities within the silicon verification team, ensuring quality silicon delivery. Duties include verification planning, communication across sites, feedback to architects, test generation, and contributing to shared infrastructure.

The Silicon Physical Design Engineer will work within the silicon physical design team to deliver high-quality final design databases to the Foundry. Responsibilities include ensuring signoff quality of designs, communication between teams, and contributing to physical design infrastructure using EDA tools to implement designs in cutting-edge technologies.

As a Technical Programme Manager at Graphcore, you will lead the development and execution of critical programs across the product lifecycle, collaborating with various technical and managerial teams to ensure timely and effective product delivery. You will manage engineering solutions and maintain documentation while driving process improvements and addressing product issues.

As a Signal Integrity Engineer at Graphcore, you will develop and simulate high-speed PCB structures ensuring optimal performance of SERDES and DDR interfaces. Responsibilities include defining PCB stack-up, conducting integrity simulations, supervising layout design, and validating prototypes in a lab environment.

The Principal BMC Engineer will lead the design and implementation of the Baseboard Management Controller software stack for AI server systems, collaborate with hardware teams to influence design, work with customers to meet their needs, and ensure security compliance. They will also mentor team members and contribute to code development and documentation.

The Principal Engineer - Platform QA will lead the Platform Quality Assurance team in establishing high-quality testing standards and processes, mentoring QA engineers, and influencing best practices across the organization. The role includes collaborating on testing strategy and staying informed on industry trends.

The Silicon Logical Design Engineer will be responsible for producing high-quality microarchitecture and RTL for Graphcore chips, ensuring effective communication across teams, and contributing to design infrastructure using EDA tools. The role involves leading chip level checks and providing feedback to various teams within the silicon design department.