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58 Minutes Ago
Cambridge, Cambridgeshire, England, GBR
552 Employees
Senior level
552 Employees
Senior level
Software
The Sr. Account Executive - Embedded Sales is responsible for driving sales of CPU IP into embedded segments, developing sales strategies, managing client relationships, achieving sales targets, conducting market research, preparing proposals, and collaborating with internal teams to meet customer needs.
58 Minutes Ago
Hsinchu County, TWN
552 Employees
Entry level
552 Employees
Entry level
Software
The AI/ML Software Engineer will optimize and deploy AI/ML models on RISC-V architectures, develop performance algorithms, and collaborate with hardware engineers. Responsibilities include model profiling, algorithm development, and contributing to open-source projects. Candidates should possess strong programming skills in C/C++ and Python, along with experience in AI/ML development.
58 Minutes Ago
Austin, TX, USA
552 Employees
Expert/Leader
552 Employees
Expert/Leader
Software
The Principal Verification Engineer at SiFive will oversee the verification of RISC-V based CPU IPs, ensuring their functionality and performance. Responsibilities include creating verification strategies, collaborating on microarchitecture design, and resolving verification challenges related to memory subsystems and caches.
58 Minutes Ago
Santa Clara, CA, USA
552 Employees
218K-266K Annually
Senior level
552 Employees
218K-266K Annually
Senior level
Software
The Principal Architect will develop scalable SoC architectures for custom chips, integrating various SoC IP components. The role focuses on creating multicore platforms for high bandwidth and innovative applications, utilizing modern EDA tools and RISC-V technology to expedite chip design and verification.
19 Hours Ago
Bengaluru, Bengaluru Urban, Karnataka, IND
552 Employees
Expert/Leader
552 Employees
Expert/Leader
Software
The Staff Engineer DV will architect test methodologies for CPU designs, develop effective verification strategies, create test plans, and build tools and test suites. This role involves collaborating closely with design teams and leading verification efforts to ensure program goals are met.
19 Hours Ago
Bengaluru, Bengaluru Urban, Karnataka, IND
552 Employees
Senior level
552 Employees
Senior level
Software
The Senior Engineer in Design Verification at SiFive will work on low power management and core microarchitecture, lead multiple projects, perform power simulation, and write scripts to assess power impact at various circuit levels. Candidates should possess strong problem-solving skills and adapt well in diverse environments.
19 Hours Ago
Bengaluru, Bengaluru Urban, Karnataka, IND
552 Employees
Senior level
552 Employees
Senior level
Software
Responsible for hands-on CPU verification using SV, UVM, and test generators. Requires 5-10 years of experience in CPU-based verification, proficiency in C and scripting with PYTHON, and knowledge of bus interface protocols.
19 Hours Ago
Bengaluru, Bengaluru Urban, Karnataka, IND
552 Employees
Mid level
552 Employees
Mid level
Software
As a Physical Flow Software Engineer, you will develop automated flows for SiFive's RISC-V Core IP, collaborating with cross-functional teams to define and implement features. This role focuses on building scalable and reusable tools that interface with physical design tools, ensuring the effective validation of RTL outputs.
19 Hours Ago
Bengaluru, Bengaluru Urban, Karnataka, IND
552 Employees
Senior level
552 Employees
Senior level
Software
The role involves leading a team in power convergence and modeling projects, emphasizing experience in AI/ML accelerators or GPUs. The candidate will conduct power simulation, ASIC power analysis, and optimization while scripting in Python, Perl, or Tcl. Strong communication skills are essential for presenting power status to management and product teams.
19 Hours Ago
Bengaluru, Bengaluru Urban, Karnataka, IND
552 Employees
Senior level
552 Employees
Senior level
Software
The Staff Engineer will focus on hands-on System Verilog and UVM development for high-performance CPU verification, including writing test cases, generating targeted tests for RISC-V CPU verification, and working with internal test generators to achieve coverage and test-plan goals.
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