As a Principal Signal/Power Integrity Engineer, you will execute SI planning, modeling, simulation, and validation for high-speed interconnects in AI and cloud infrastructure products. Responsibilities include formulating validation plans, conducting experiments, and ensuring compliance with specifications while collaborating with internal customers for system robustness.

The Signal/Power Integrity Engineer will execute SI planning, design, modeling, simulation, and lab validation for connectivity products. Responsibilities include formulating a system validation plan, designing experiments, and ensuring specification compliance while collaborating with internal customers to quantify margins.

As a Senior/Tech Lead Software Engineer at Astera Labs, you will develop diagnostic software for high-speed data center products, oversee manufacturing processes, conduct testing and validation, and collaborate with hardware teams. You will also mentor junior members and engage in project planning and discussions.

The Principal ASIC Engineering Program Manager leads engineering activities for ASIC product development, ensuring on-time and high-quality delivery from concept to production. Responsibilities include program planning, risk assessment, managing cross-functional teams, and contributing to process improvements within the organization.

The Principal Diagnostic Platform Software Engineer will develop diagnostics and manufacturing software for high-speed data center products. Responsibilities include implementing tests for hardware validation, performing root-cause analysis of failures, and coordinating with hardware engineering. The role involves both independent work and team collaboration, mentoring junior staff, and participating in design discussions.

The Tech Lead/Principal Product Applications Engineer at Astera Labs will design and support Smart Cable Modules for cloud and networking applications, providing technical guidance, generating product collateral, and collaborating with internal teams for product innovation and improvement.

The Digital Design Manager will oversee the development of microarchitecture and front-end circuit design for high-performance network controllers. Responsibilities include managing RTL, synthesis, IP integration, block-level verification, and collaboration with software teams, ensuring designs adhere to communication standards.

The Principal Product Manager will lead the product management process for AI semiconductor solutions in data center applications, driving product definition, go-to-market strategies, and collaboration with engineering teams. Responsibilities include market assessment, customer engagement, and executing successful product launches.

As a Sales Engineer Intern, you will learn to understand customer needs, provide technical solutions, conduct product demonstrations, and maintain customer relationships. You'll gain knowledge in semiconductor products and gain hands-on experience with AI hardware infrastructure while collaborating with sales and engineering teams.

The Content Marketing Lead at Astera Labs will develop and implement a robust content strategy aligned with product lines, manage the content team, track engagement, and utilize analytics to optimize content performance across various platforms. This role requires collaboration with cross-functional teams to generate innovative content ideas and maintain a high standard of delivering engaging material.

The Senior Principal Analog Circuit Designer leads the design and optimization of advanced analog circuits for high-performance systems. Responsibilities include conducting simulations, collaborating with cross-functional teams, mentoring junior engineers, and ensuring successful integration of designs. The role requires expertise in analog process technology and circuit design.

The Senior Analog Circuit Designer will lead the design and optimization of advanced analog circuits for high-performance systems, conduct simulations for validation, collaborate with cross-functional teams, develop design methodologies, and support production transitions.

As a Sr. Hardware Optical Engineer, you will design boards for connectivity and memory products and work closely with manufacturing, customer engagement, and post-production support. You’ll contribute to product improvements and collaborate with internal teams and customers for tailored solutions.

As a Senior Analog Mixed-Signal Design Engineer, you will develop and verify advanced node CMOS products including circuits like PLL, DLL, ADC, and others, ensuring performance targets are met. The role involves working with industry-standard tools and requires hands-on experience in high-speed mixed-signal circuits, along with strong collaboration and problem-solving skills.

The Principal Digital Design Engineer will design and implement high-performance digital solutions, focusing on RTL development, micro-architecture, and IP integration for processor and peripherals. Responsibilities include ensuring timing closure, overseeing design verification, and collaborating with cross-functional teams.

The Senior Digital Design Engineer will design and implement high-performance digital solutions with a focus on RTL development and timing closure. Responsibilities include IP integration, overseeing design processes from architecture to GDS, and performing pre- and post-silicon debug.

The Senior Data Scientist at Astera Labs will focus on identifying and collecting key data points, developing data collection strategies, and deriving actionable insights. Responsibilities include creating and deploying data collection scripts, ensuring data quality, and utilizing AI techniques for analysis, collaborating with cross-functional teams to optimize data-driven decisions.

As a Principal DFT Engineer at Astera Labs, you will be responsible for overseeing the DFT design process for semiconductor connectivity products. This role involves collaborating with various engineering teams throughout the product lifecycle, ensuring effective testing, reliability analysis, and coordination in delivering innovative solutions to major cloud service providers and OEMs.

The Principal Formal Verification Engineer will develop verification test plans, implement verification models and assertions, and collaborate with design teams to ensure design correctness. The role requires expertise in formal verification, scripting for productivity enhancement, and participation in design reviews to optimize metrics based on formal analysis.

The Senior Analog Mixed-Signal Design Engineer will develop and verify circuits such as PLL, DLL, ADC, regulators, and amplifiers for advanced node CMOS products. Responsibilities include hands-on design of high-speed mixed-signal circuits, collaborating with global teams, and participating in lab chip bring-up and debugging efforts.