Hardware Design Engineer and uArchitect of Processors & Accelerators

Posted Yesterday
Be an Early Applicant
Athens
Junior
Hardware • Automation
The Role
The Hardware Design Engineer will define and implement microarchitectures for RISC-V processors, collaborate with teams on verification, optimize designs for performance, and utilize tools for synthesis and automation.
Summary Generated by Built In

Description

Welcome to Codasip

We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient CPU cores from scratch, and our own automated proprietary tools to fully customize them. We give our customers a unique competitive advantage by empowering their system-on-chip developers to build the most innovative products.

Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language, CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions.

Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including our first and largest design center in the beautiful city of Brno, Czechia. Across Europe, we already have design teams in Cambridge, Bristol, Munich, Villeneuve-Loubet, Barcelona, Thessaloniki, Heraklion and Athens. The Codasip team is also based close to its customers, which means we have dedicated sales and application engineers in the USA, Japan, Korea, and China.

Codasip is a private company backed by well-funded EU grants. Our products are already making a real impact, with billions of devices already in the market powered by our processor IP and tools.

The Greek Design Center

Codasip is expanding its Greek Design Centers, which are led by - our IP Engineering Director. We are looking for Design & uArchitect Engineers to continue building out our team and help deliver and expand our product roadmap. This is an exciting opportunity to join a fast-growing company with a unique position in the industry. If you are proactive, you are not afraid to voice your own opinion, and are looking for a job where you can be creative, we think you will work well with us. Together with our well-organized and highly collaborative international teams, located in the Czech Republic, Germany, France, Spain, and the UK you will be responsible for the development of the or of the accelerator microarchitecture.

YOUR ROLE:

  • Be responsible for the microarchitecture definition and implementation of RISC-V processors and components and leading a team to deliver
  • Processor development in our architecture language (CodAL)
  • Design generic solutions and process automation
  • Working closely with the verification team on project deliveries and verifying the Design
  • Synthesis (timing and area optimizations) to ensure PPA targets can be met
  • Participate in design and verification reviews
Requirements

YOU SHOULD HAVE:

  • Good knowledge of modern CPU architectures (ideally RISC-V) and micro-architectures, or alternatively track of records in the design of complex pipelined designs.
  • Advanced knowledge of at least one Hardware Description Language (preferably - Verilog/SystemVerilog)
  • Sharp understanding of physical implications when designing at a higher level of abstraction (digital design synthesis and implementation flow).
  • Skills to design and optimise a module around a given PPA point.
  • Practical expertise in versioning tools (preferably git)
  • Proficiency in scripting languages (Shell, Python, Tcl)
  • Practical usage of Linux
  • Proficiency in digital design synthesis and implementation flow
  • Communicative English. Our team is highly distributed, so English is the main language

NICE TO HAVE:

  • Hands-on experience with HW simulators and synthesis tools
  • Proficiency in computer architecture and systems
  • Ability to write clear and concise code
  • Active interest in the field and self-education
  • Analytical thinking, self-sufficiency, team spirit, open-minded and passion to learn
  • Experience with Formal Verification concepts
Benefits

WHAT WE CAN OFFER YOU:

  • Opportunity to work with RISC-V, computer architecture of the future
  • Working on innovative IoT processors and unique processor optimization technology
  • Participation in the whole development process from analysis to deployment
  • Opportunity to collaborate with experienced developers located in Germany, France, UK, Greece and Czech Republic
  • Receptivity to your own innovations and ideas
  • Freedom and trust from Codasip management
  • Flexible working hours, including working from home
  • Very competitive compensation package

Want to be an architect of ambition? Join Codasip

At Codasip we are committed to fostering a creative and collaborative work environment. Codasippers have the freedom to explore original ideas and experiment with new techniques. We believe in the benefits of cross-departmental collaboration and encourage sharing to build awareness throughout the teams. This enables you to add value through variety in your work.

When you join Codasip, you become part of a motivated team of self-starters where your ideas are appreciated and your voice is heard. We strive to create an environment where your ambition can flourish and your career can reach new heights. So, come and join our team of architects of ambition. We can't wait to see what you'll achieve at Codasip.

Top Skills

Python
Risc-V
Shell
Systemverilog
Tcl
Verilog
The Company
HQ: Munich
229 Employees
On-site Workplace
Year Founded: 2014

What We Do

Codasip is a processor solutions company which helps developers to differentiate their products. We are Europe’s leading RISC-V company with a global presence. Billions of chips already use our technology.

In today’s technology market, differentiation is everything. The difference between success and failure. And, in chip design, this difference is quite literally wafer thin. With increasing transistor costs, your developers can no longer rely on semiconductor scaling and legacy processors to achieve your goals. The only way forward is to implement custom compute with designs tailored to your applications.

We deliver custom compute through the combination of the open RISC-V ISA, Codasip Studio processor design automation and high-quality processor IP. Our innovative approach lets you easily customize and differentiate your designs. You can develop high-performing, and game-changing products that are truly transformational.

Founding member of RISC-V International.
Founding member of the CHERI Alliance.

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