ASIC/SOC Silicon Verification Engineer

Posted 23 Days Ago
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Mountain View, CA
Expert/Leader
Artificial Intelligence • Hardware • Software
The Role
As a Silicon Verification Engineer, you will be responsible for executing the verification process for silicon, focusing on functional accuracy and performance. This involves developing testbenches and tests, managing verification methodologies, and overseeing verification milestones from design freeze to tapeout.
Summary Generated by Built In

MatX's mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead in AI quality and availability. MatX is seeking silicon verification engineers to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for these roles will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies.

Responsibilities include:

  • Contribute to MatX’s verification methodology with a scalable solution across blocks, subsystems, fullchip and system-level validation
  • Own portions of verification execution at subsystem and chip-level and create testbenches, tests and related artifacts to achieve structural and functional coverage closure
  • Plan and drive intermediate and sign-off reviews on verification test plans, execution progress and verification closure towards various silicon milestones including design freeze and tapeout

Requirements:

  • Concept-to-silicon experience in driving verification from an architecture and/or design specification to production silicon 
  • Experience with SystemVerilog, Python, C/C++, Bluespec and similar scripting and programming languages for verification and silicon modeling
  • Production experience with advanced verification methodologies such as UVM, assertion-based verification (ABV); experience and comfort with formal and simulated verification are required
  • Production experience with creating portable tests and drivers for verification that apply to silicon validation and post-silicon debug
  • Strong understanding of silicon micro-architecture and design concepts used in high-performance compute (CPUs, GPUs, accelerators), high-speed connectivity, memory management and related functionalities
  • Familiarity with emulation and prototyping platforms and methodologies is a plus
  • Hands-on experience with participation in silicon debug and bring-up is a plus

Compensation

  • The US base salary for this full-time position is $120,000 - $400,000 + equity

Benefits

  • Commuter stipend available for employees within 60 minutes of the office
  • 401(k) with contribution matching
  • Health, vision, and dental insurance
  • Life and AD&D insurance

As part of our dedication to the diversity of our team and our focus on creating an inviting and inclusive work experience, MatX is committed to a policy of Equal Employment Opportunity and will not discriminate against an applicant or employee on the basis of race, color, religion, creed, national origin or ancestry, sex, gender, gender identity, gender expression, sexual orientation, age, physical or mental disability, medical condition, marital/domestic partner status, military and veteran status, genetic information or any other legally recognized protected basis under federal, state or local laws, regulations or ordinances.

All candidates must be authorized to work in the United States and work from our offices in Mountain View Tuesdays-Thursdays.

This position requires access to information that is subject to U.S. export controls. This offer of employment is contingent upon the applicants capacity to perform job functions in compliance with U.S. export control laws without obtaining a license from U.S. export control authorities.

Top Skills

C
C++
Python
Systemverilog
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The Company
HQ: Mountain View, CA
19 Employees
On-site Workplace

What We Do

MatX designs hardware tailored for the world’s best AI models: We dedicate every transistor to maximizing performance for large models. For these models, we deliver 10× more computing power, enabling AI labs to make models an order of magnitude smarter and more useful. Our hardware would make it possible to train GPT-4 and run ChatGPT, but on the budget of a small startup.

A world with more widely available intelligence is a happier and more prosperous world—picture people of all socioeconomic levels having access to an AI staff of specialist MDs, tutors, coaches, advisors, and assistants.

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