Top Perl Jobs in Boston, MA

The Principal Software Engineer will oversee the development of Python libraries and services for the Nasuni Appliance, conduct requirements analysis, develop software for NAS appliances, debug issues, and work with customer support on escalations.

As a Design Verification Engineer, you will lead verification environment development for FPGA signal processing on advanced electronic systems. Responsibilities include planning, architecting, developing testbenches, creating test plans, analyzing metrics, mentoring junior engineers, and driving improvements in verification processes.

The Eagle Developer will work with Eagle Star, Race, and CDJ applications. Responsibilities include application development using Java3, JavaScript, Python3, and Perl. The role requires communication with the Director and involves occasional travel.

As the SoC Design Verification Lead, you will manage a team of Digital Design Verification Engineers to oversee the verification of SoC logic and IP. Responsibilities include creating test plans, applying UVM and FPGA methodologies, driving best practices, and ensuring project delivery while mentoring your team.

The Senior ASIC Verification Engineer will be responsible for verifying ASIC designs and architectures, particularly for High Speed I/O controllers. This includes developing test plans, collaborating with other teams, and utilizing advanced verification methodologies such as UVM.

The Principal Backup & Disaster Recovery Architect will design and maintain backup and disaster recovery solutions, ensuring data protection and rapid recovery from disruptions. Responsibilities include leading recovery strategies, implementing enterprise solutions, collaborating with teams, optimizing processes, and ensuring compliance. The role demands strong technical leadership, experience in various technologies, and the ability to mentor junior team members.

The FPGA Design Engineer II will design, develop, and maintain FPGA systems for electronic trading, contributing to RTL design and collaborating with verification engineers on testing. This role involves improving development processes and requires expertise in digital logic design and computer architecture.