Sr. Product Engineering Architect

Posted 3 Days Ago
Be an Early Applicant
San Jose, CA
196K-364K Annually
Mid level
Cloud • Hardware • Software • Semiconductor
The Role
The Sr. Product Engineering Architect will help customers adopt the HLS solution, drive evaluations, and research new features, collaborating with field teams and providing training on HLS use. Responsibilities include solving technical design issues and defining feature requirements for the Stratus tool.
Summary Generated by Built In

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

At Cadence, we are about making an impact on the world of technology by creating innovative design and verification products. The Stratus HLS team has the ambitious goal of transforming digital design by establishing high level synthesis as the mainstream methodology for 95% of all digital design. We are looking to add a team member to embrace that goal and make significant contributions toward it.

This Product Engineering Architect will help our customers adopt HLS and to define future generations of HLS features to satisfy the needs of those customers. He/she will drive customer evaluations and use of Stratus, research potential new HLS capabilities, and evaluate customer needs to create detailed product specifications that are ready to be acted on by the product development team.

Specific Duties and Responsibilities:

As part of the Stratus Solutions Engineering team you will

  • Work closely with the field application engineering and sales teams to help new customers adopt the Cadence HLS solution
  • Support existing HLS customers by solving challenging technical design issues for ongoing and new projects
  • Research new potential HLS capabilities
  • Work with a team of other product experts and R&D to define feature requirements to improve the Stratus™ HLS tool flow and design methodology
  • Provide training on HLS use and features to new users

Requirements:

  • Candidates must have a strong background in hardware design and verification for ASIC targets
  • Must have familiarity with C++
  • Must have experience using hardware design and other tools in the Linux environment
  • BSEE/BS Computer Science, Computer Engineering, Electrical Engineering. MS preferred
  • Experience with high-level synthesis a huge plus

The annual salary range for California is $196,000 to $364,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Top Skills

C++
The Company
HQ: San Jose, CA
8,216 Employees
On-site Workplace
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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