Silicon Design Engineering Intern (Summer 2025)

Posted 18 Hours Ago
Be an Early Applicant
Austin, TX
Internship
Cloud • Hardware • Software • Semiconductor
The Role
As a Silicon Design Engineering Intern, you will work with a team to develop automation tools and flows for IP configuration and device assembly. You will gain practical experience while making meaningful technical contributions to the team.
Summary Generated by Built In

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Silicon Design Engineering Intern (Summer 2025)

The Cadence Silicon Solutions Group (SSG) develops industry-leading Digital IP (Intellectual Property), from RISC-V processor cores to DSPs to Memory Controllers and IO solutions. Our configurable and extensible IP solutions are poised to meet the demands of next-generation applications such as intelligent IoT Devices and ML/AI edge inference. Essentially, all leading semiconductor providers can be counted as Cadence customers.  

 
The Cadence SSG Team is hiring students to join our R&D teams in San Jose or Austin. This is an amazing opportunity to work at a world leader in computational software, semiconductor design IP, and system verification hardware.  Our customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare. 
 

We aim to make you an integral part of the team by providing training, mentorship, and encouragement of your creative talents. Our goal is to equip students with practical work experience. We understand that it is best to learn by doing. We will provide tasks that enable you to learn while making meaningful technical contributions.  

Come be part of this great SSG Team where your contributions can make a visible impact. Your work will be integral to our success and the advancement of our industry.   

Responsibilities:

The role is a design engineer working within a team to develop the next generation automation tools and flows for IP configuration and device assembly.   

Requirements:

Currently pursuing BS or MSEE or equivalent.

Ideal candidate can demonstrate scripting skills (Perl / Python) as well as experience with SystemVerilog.

Company Information:

Cadence is the global leader in software, hardware, and services, driving the transformation of the electronic design automation (EDA) industry. This application-driven approach for creating, integrating, and optimizing designs helps customers realize Analog & Digital ICs, System-On-Chip devices, IP, and complete systems at lower costs and with higher quality.

Cadence is an equal opportunity employer committed to hiring a diverse workforce.

We’re doing work that matters. Help us solve what others can’t.

Top Skills

Perl
Python
Systemverilog
The Company
HQ: San Jose, CA
8,216 Employees
On-site Workplace
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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