Senior/Principal Verification Engineer

Posted 3 Days Ago
Be an Early Applicant
5 Locations
Remote
Senior level
Hardware • Automation
The Role
The role involves verifying new Codasip IP designs, contributing to system-level verification using SystemVerilog and UVM test benches, and collaborating with a distributed team.
Summary Generated by Built In

Description
  • Department/Team: IP Development, Platforms team
  • Employment: Full-time
  • Experience level: Mid-Senior-Principal
  • Location of work is Spain or ideally our Design Center in Barcelona
  • Please note this role is only open to candidates with working rights in Spain

Why are we hiring?

We’re looking for an IP Verification engineer to join our Platforms team to help verify new Codasip IPs, working alongside designers and software engineers. The platforms team is a mixed-skilled team working on system integration, IP design and verification, software development, and performance analysis of RISC-V based technology. Our work is designed for ASIC implementation, FPGA prototyping and customer evaluations.

What will you do?

  • Verify IP blocks using standard SystemVerilog UVM test benches;
  • Contribute to the verification/validation of the IP blocks at the system-level.
Requirements

The following skills are essential to perform the job duties:

  • Experience with UVM hardware verification using System Verilog
  • Knowledge of scripting tools (Python)
  • Active usage of versioning tools (Git -preferred)
  • Experience with software automation (GitLab, Jenkins, etc.)
  • Excellent English communication skills. English. Our team is highly distributed, so English is the primary language

The following skills and experience are nice to have:

  • IP Validation at the system level
  • Good understanding of Object Oriented Programming Concepts and Design Patterns
  • Knowledge of RISC-V
Benefits

About Codasip:

We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient CPU cores from scratch, and our own automated proprietary tools to fully customize them. We give our customers a unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language, CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including our first and largest design center in the beautiful city of Brno, Czechia. Codasip products are already making a real impact, with billions of devices already in the market powered by our processor IP and tools.

Top Skills

Git
Gitlab
Jenkins
Python
Risc-V
Systemverilog
Uvm
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The Company
HQ: Munich
229 Employees
On-site Workplace
Year Founded: 2014

What We Do

Codasip is a processor solutions company which helps developers to differentiate their products. We are Europe’s leading RISC-V company with a global presence. Billions of chips already use our technology.

In today’s technology market, differentiation is everything. The difference between success and failure. And, in chip design, this difference is quite literally wafer thin. With increasing transistor costs, your developers can no longer rely on semiconductor scaling and legacy processors to achieve your goals. The only way forward is to implement custom compute with designs tailored to your applications.

We deliver custom compute through the combination of the open RISC-V ISA, Codasip Studio processor design automation and high-quality processor IP. Our innovative approach lets you easily customize and differentiate your designs. You can develop high-performing, and game-changing products that are truly transformational.

Founding member of RISC-V International.
Founding member of the CHERI Alliance.

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