Senior Staff Design Verification Engineer

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M® product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform.
As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers’ specifications whether they’re a major telecom organization or automotive company, etc.

What You Can Expect

• Lead the design verification of complex CPU sub-systems.
• Work hands-on on a test bench, test plan, and coverage plan are needed.
• Mentor and guide a team of design verification engineers.
• Own the sub-system verification flows, methodologies, and verification of IP/Sub-system - conclude with the required verification criteria. 

What We're Looking For

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience.
• Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience.
• Experience with processors and SOC architectures such as interrupt controllers & Arm CPU sub-system is a must.
• Experience with SoC verification is a must. 
• Experience with digital design verification of Block/IP level.
• Proven track record in ASIC verification, from environment development to test development
• candidate should have Hands-on verification experience and proficiency using System Verilog and UVM.
• Should have experience in the constrained-random stimulus and use of functional coverage.
• Strong debug skills and experience with debug tools such as Verdi and Incisive.
• Good knowledge of AMBA protocols – AXI, AHB, APB
• Creating a test bench, test plan, and coverage plan from scratch by hand on at least one complex project.
• Knowledge of the GIT version control system.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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