Lead the go-to-market strategy for ethernet switching products in data centers, collaborating with engineering and sales to meet customer needs and drive revenue.

The role entails overseeing IP/Sub-System Verification, defining test plans, developing testbenches, executing design verification, and debugging simulation failures.

The role involves RTL coding, verification, micro-architecture design, power optimization, synthesis, and chip validation within the Automotive Ethernet domain.

The engineer will develop analog behavior models for SerDes circuits, improve design methodology, and support teams for silicon verification.

The Principal Package Design Engineer will lead advanced package design, improve workflows, and collaborate cross-functionally to innovate and validate new PCB substrates for high-performance computing.

The role involves developing test plans and verification infrastructure for high-performance data processing semiconductors, collaborating with various engineering teams, and maintaining quality standards in testing.

Manage cross-functional teams to drive supply chain strategies, cost management, and financial health of products throughout their lifecycle. Collaborate globally to achieve corporate gross margin goals while implementing best practices for cost efficiency.

As a Digital IC Design Staff Engineer, collaborate on Automotive Ethernet and PHY design, write technical specifications, design RTL code, and assist in debugging and closure of design issues.

As a Senior Engineer in Analog Layout, you will design microelectronic layers, run simulations, and collaborate with global teams to refine and debug designs.

The Senior Analog Layout Engineer designs microelectronic layers using CAD tools, collaborates with engineers to refine designs, and presents project updates.

The Package Design Engineer will evaluate design feasibility, implement package designs physically, and collaborate closely with teams on optimizing designs for electrical and manufacturing requirements.

Design, simulate, and analyze high-speed optical communication systems. Develop optical models, optimize performance, and perform signal integrity analysis for next-gen architectures.

The Senior Test Engineer designs and develops ATE test solutions and hardware, collaborates with teams, optimizes test flows, and creates test plans.

As an Analog Layout Staff Engineer, you will collaborate on the design and verification of high-speed analog circuits, working with global teams and participating in all aspects of the project lifecycle.

The Failure Analysis Senior Staff Engineer will manage failure analysis processes for customer returns and internal support, leading cross-functional teams and external labs to analyze root causes and ensure quality standards.

The Staff Engineer, DFT will focus on DFT simulation and implementation, working with multi-functional teams to resolve issues for successful Tape-out, requiring expertise in DFT tools and methodologies.

Lead the development of ATE test solutions, innovating high-speed testing hardware, crafting comprehensive test plans, and optimizing test methodologies in a collaborative environment.

The Senior Applications Engineer will support customer issues with AEC products, collaborate with teams, drive design wins, and create technical documentation.

Lead the cybersecurity team to ensure compliance with regulations, conduct risk assessments, and develop security policies while managing audits and incident responses.

The Engineering Program Manager leads complex projects in semiconductor solutions, managing the entire program lifecycle, collaborating with cross-functional teams, and ensuring effective communication and risk management.