Senior Principal IC Design Engineer

Posted 12 Days Ago
Be an Early Applicant
3 Locations
169K-253K
Expert/Leader
Semiconductor
We create custom semiconductor solutions that move, process, store, and secure data quickly and reliably.
The Role
The Senior Principal IC Design Engineer will lead NoC architecture for SoCs, develop specifications, implement RTL codes, and collaborate with cross-functional teams to ensure high-quality hardware design.
Summary Generated by Built In

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Marvell’s Cloud Data Center Group develops cutting-edge semiconductor solutions in the most advanced technologies. Our focus is on solving the most difficult design problems in the areas of AI, wired and wireless communications, and other infrastructure applications.
As a member of our R&D team, you will design and implement world-class hardware, making a significant impact for the company and our renowned customers who are leaders in their respective domains. Join us to collaborate with brilliant technologists and advance your career in an organization that values problem-solving, transparency, and execution.

What You Can Expect

•    Lead NoC architecture and configuration work for complex SoCs targeting multi-clock high speed designs.
•    Define the micro-architecture of SoCs including its blocks, cores, accelerators, and subsystems.
•    Work closely with the architecture, floorplanning, backend, verification, DFT, STA teams and other cross functional teams to produce high quality hardware.
•    Develop and write micro-architectural specifications of the design.
•    Implement designs using good RTL coding and low power techniques.
•    Collaborate with the backend team to close on synthesis, place and route, and timing signoff.
•    Collaborate with the verification team on pre-silicon verification tasks such as reviewing test plans, coverage closure, and full-chip simulation debug. 
•    Plan, scope and time tasks with the project manager.
•    Work with post silicon group to resolve any lab issues and successfully bringup silicon.
•    Collaborate with the software team to ensure customer use cases requirements are met.

What We're Looking For

•    Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 15+ years of related professional experience.
•    Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 10+ years of experience.
•    PhD in Computer Science, Electrical Engineering or related fields with 8+ years of experience.
•    Must have experience with Network-on-Chip (NoC) architecture and design using Arteris FlexNoC tool.
•    Experience with general digital design microarchitecture development is a must.
•    Design/RTL experience in Verilog or SV is a must.
•    Knowledge of scripting languages, such as PERL, Python
•    Experience with high speed, low power, and area optimized designs.
•    Experience working with multi-clock designs, DFT, resets, LEC, Lint, etc
•    Good learning, problem solving interpersonal and communication skills.
•    Must be a team player with a strong can-do attitude.
•    Self-motivated team player able to thrive in a fast-paced engineering environment.

Expected Base Pay Range (USD)

168,920 - 253,000, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

#LI-TM1

Top Skills

Arteris Flexnoc
Network-On-Chip (Noc)
Perl
Python
Systemverilog
Verilog
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The Company
HQ: Santa Clara, CA
6,500 Employees
Hybrid Workplace
Year Founded: 1995

What We Do

Marvell specializes in semiconductor solutions that power a wide range of industries, from data centers and 5G networks to AI, automotive, and storage applications. Our cutting-edge products are designed to meet the constantly evolving demands of a connected world, enabling faster, more efficient and more secure data processing and communication. With a focus on excellence and a commitment to advancing technology, we develop solutions that drive progress and transform industries.

Why Work With Us

Life at Marvell means being a part of new innovation and enduring technology; but it's also much more. Our diverse community is strengthened through cultural events, corporate gatherings and team-building activities, fostering collaboration and making work enjoyable. At Marvell, it's not just a job; it's an enriching, community-driven experience.

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