Principal Performance Pathfinding Engineer

Posted Yesterday
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Santa Clara, CA
218K-266K Annually
Senior level
Software
The Role
The Principal Performance Pathfinding Engineer will lead a team to research and develop high-performance processor architectures and micro-architectures. This includes defining performance targets, conducting experiments, and collaborating with design teams to meet delivery goals.
Summary Generated by Built In

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time. 

Are you ready?

To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.

Job Description:

 

SiFive is creating RISC-V based CPU IPs faster and cheaper than ever before by combining the best practices of rapid, iterative software design with the proven fidelity of hardware engineering. We are seeking an experienced leader in helping SiFive to research and develop next generation high performance processors.

Responsibilities:

  • Lead a team of performance engineers to research, model and develop architecture / micro-architecture ideas to build state-of-the-art performance processors that reach our aggressive performance targets.

  • Work with Product Management, Product Architect to define architecture / product performance target

  • Design and carry out experiments to research and develop architecture / micro-architecture features 

  • Work with the design team to implement and deliver performance target in RTL

Requirements:

  • MS or PhD in Computer Science / Computer Architecture

  • 10+ years of experience in high performance processor development

  • 5+ years involved in the engineering team to deliver HW or SW products.

  • Hands-on expertise with either HW development (RTL/implementation flows, verification/validation, backend flows, FPGA flows); FPGA debug, including the use of Integrated Logic Analyzer for waveform capture and debug

  • Expert in analyzing performance bottlenecks in micro-architecture and software stack. Awareness of potential security holes is a plus.

  • Strong foundation in computer architecture of high performance out-of-order CPU designs. Awareness of known industry micro-architectures is a plus.

  • Strong foundation in workload characterization to identify HW/SW performance bottlenecks

  • Strong foundation in workload reduction techniques for efficient performance simulation and projection 

Pay & Benefits

Consistent with SiFive values and applicable law, we provide the following information to promote pay transparency and equity. We have a market-based pay structure which varies by location. Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job-related knowledge, skills, and relevant work experience. 

For candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as, skill level, competencies, and work location. The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee.

Base Pay Range

$217,800.00-$266,200.00

In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more! 

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in

United States of America

Any offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.

SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

California residents: please see our job candidate notice for more information on how we handle your personal information and your privacy rights: Privacy Policy Document.

Top Skills

Risc-V
The Company
HQ: San Mateo, CA
552 Employees
On-site Workplace
Year Founded: 2015

What We Do

The heart of SiFive is RISC-V! SiFive creates the building blocks of RISC-V-based IP that are the inevitable innovative reimagining of every computing platform.

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