At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Candidate should have worked on Finfet technology layouts. Exposure to technology nodes like 3nm/5nm and 7nm is required.
Candidate should have 6+ years of experience in custom layout. Experience on high-speed analog mixed-signal layout is desirable.
Role:
- Candidate will own and Lead Major blocks of Memory PHY Layout design.
- Candidate would perform hand-on design of critical analog and high-speed layout blocks.
- Candidate would co-ordinate design work with Circuit leads, layout contractors and layout team members.
- Candidate would participate in layout reviews by presenting and reviewing custom layout designs.
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Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
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