Hardware Verification Engineer (DE)

Posted Yesterday
Be an Early Applicant
3 Locations
Mid level
Hardware • Automation
The Role
As a Hardware Verification Engineer at Codasip, you will design and develop high-performance CPU cores using the RISC-V architecture. You will engage in hardware verification through simulation and formal tools, utilizing software skills in C++ or Python, and contribute to innovative processor optimization technology.
Summary Generated by Built In

Description

Welcome to Codasip

We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient CPU cores from scratch, and our own automated proprietary tools to fully customize them. We give our customers a unique competitive advantage by empowering their system-on-chip developers to build the most innovative products.

Our processor cores are based on the open RISC-V architecture The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language, CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions.

Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including our first and largest design center in the beautiful city of Brno, Czechia. Across Europe, we already have design teams in Cambridge, Bristol, Munich, Villeneuve-Loubet, Barcelona, Thessaloniki, Heraklion and Athens. The Codasip team is also based close to its customers, which means we have dedicated sales and application engineers in the USA, Japan, Korea, and China.


Codasip is a European private company backed by well-funded EU grants. Our products are already making a real impact, with billions of devices in the market powered by our processor IP and tools.


  • Department: Development IP
  • Employment: Full-time
  • Experience level: Mid-Senior (Ph.D./ MSc/.)
  • Location: Germany (Preferably Munich)
Requirements

YOU NEED TO POSSESS THE FOLLOWING KNOWLEDGE AND SKILLS:

  • Experience with HW verification (simulation tools, formal tools, methodologies like UVM)
  • Knowledge of versioning tools (Git -preferred) and Linux
  • Software skills (C++ or Python preferred)
  • Eagerness to constantly learn new things, active interest in the field, and self-education
  • Self-organization and reliability


NICE-TO-HAVES:

  • Desire to play a role in shaping the RISC-V world of tomorrow
  • Knowledge of HDL languages (Verilog, VHDL, or System Verilog)
  • Experience in Object-Oriented Programming and software engineering
  • DIY activities related to open-source software, home automation, robotics, or similar
  • University degree in a related field (Microelectronics, HW design, Embedded SW, Robotics or similar)


Benefits
  • Opportunity to work with RISC-V, computer architecture of the future
  • Working on innovative and unique processor optimization technology (HLS)
  • Participation in the whole development process from analysis to deployment
  • Keeping in touch with the latest trends in the industry
  • Opportunity to collaborate with experienced developers located within EU and UK
  • Receptivity to your own innovations and ideas
  • Freedom and trust from Codasip DNA
  • Flexible working hours, including hybrid working mode (2 days office/ 3 days HO preferably)
  • 31 days of holiday leave

SOME USEFUL LINKS ON CODASIP:

We're passionate about RISC-V processors. If you are, apply now :)

Top Skills

C++
Python
The Company
HQ: Munich
229 Employees
On-site Workplace
Year Founded: 2014

What We Do

Codasip is a processor solutions company which helps developers to differentiate their products. We are Europe’s leading RISC-V company with a global presence. Billions of chips already use our technology.

In today’s technology market, differentiation is everything. The difference between success and failure. And, in chip design, this difference is quite literally wafer thin. With increasing transistor costs, your developers can no longer rely on semiconductor scaling and legacy processors to achieve your goals. The only way forward is to implement custom compute with designs tailored to your applications.

We deliver custom compute through the combination of the open RISC-V ISA, Codasip Studio processor design automation and high-quality processor IP. Our innovative approach lets you easily customize and differentiate your designs. You can develop high-performing, and game-changing products that are truly transformational.

Founding member of RISC-V International.
Founding member of the CHERI Alliance.

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