Digital Design Sr. Principal Application Engineer

Posted 3 Days Ago
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San Jose, CA
144K-267K Annually
Expert/Leader
Cloud • Hardware • Software • Semiconductor
The Role
The Digital Design Sr. Principal Application Engineer at Cadence is responsible for deploying PPA methodologies, providing technical support to customers, enhancing tools and methodologies, and translating customer requirements into tool solutions. They will work closely with R&D and drive the adoption of Cadence technologies, ensuring customer satisfaction and project success.
Summary Generated by Built In

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

As an expert Digital Implementation Field Applications Engineer (AE) , you will work side-by-side with our leading edge customers. With your expertise, you'll help deploy Cadence’s market-leading technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts into reality. The greater your powers, the more business opportunities you'll help bring to the table. You will also work directly with the Cadence R&D group to drive the customer requirements and influence the direction of Cadence next-generation products and technologies.

Key Responsibilities

  • Explore and Deploy Latest PPA methodologies/flows on Next generation Customer Designs
  • Drive technical evaluations/benchmarks to success
  • Provide technical support to Cadence customers in the areas of Backend Digital Design Implementation and Signoff
  • Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules
  • Work closely with R&D to enhance the tools and methodologies to meet and exceed customer’s requirements
  • Drive adoption and proliferation of Cadence tools and technologies 
  • Efficiently translate customer requirements into tool solutions by working closely with R&D

Job Requirements

  • Minimum 10+ years of industry hands on experience
  • BS degree (or higher) in Computer/Electrical Engineering
  • Strong knowledge of Digital Design Fundamentals and Static Timing Analysis
  • Prior experience with IC digital implementation flows - Synthesis, Place and Route, IR Drop, Timing Signoff
  • Prior experience with Cadence tools (Genus, Innovus, Conformal, Tempus, Modus, Voltus) or ICC, ICC2, DC, FC , Primetime
  • Experience with advanced nodes 5nm and below
  • Expertise in scripting languages as Tcl/Perl/Python/shell is a must
  • Strong customer-facing communication and problem-solving skills
  • Strong verbal, written, and customer communication skills

The annual salary range for California is $143,500 to $266,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Top Skills

Perl
Python
Tcl
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The Company
HQ: San Jose, CA
8,216 Employees
On-site Workplace
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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