Search the 17 jobs at InnoPhase IoT

The Staff Software Engineer will design and implement security features for IoT solutions, analyze and test vulnerabilities in firmware, support customer trials, and manage security certifications. The role requires strong experience in embedded software and secure software development lifecycle.

The PHY Verification Engineer will conduct low-power WiFi and Bluetooth verification, develop UVM testbenches, work on test planning, and analyze design and verification coverage. Collaboration with cross-functional teams is key to identify optimizations and maintain testing regressions.

The Principal Engineer will lead the design and development of analog and mixed-signal ICs, particularly ADCs in CMOS processes. Responsibilities include technical leadership, supervising layout activities, conducting behavioral model simulations, and collaborating with cross-functional teams for product development and testing.

Design and develop firmware for wireless IoT solutions, lead the development of 802.11 MAC firmware, and collaborate with international teams to deliver end-to-end ecosystem solutions.

You will implement MAC and PHY algorithms for low power IoT connectivity devices, develop specifications from standards, create micro-architectures using Verilog/SystemVerilog, and collaborate with RF/baseband and firmware teams. Special focus will be on low power design aspects and working with ASIC/FPGA implementation teams.

The Staff/Sr. Staff PHY Design Engineer at Innophase IoT is responsible for developing micro-architectures and RTL for low-power wireless communication protocols. This role involves designing digital signal processing engines, analyzing design bottlenecks, and collaborating with verification teams on testing plans and physical design elements.

The PHY Verification Engineer/Lead will handle Low-power WiFi and BT/BLE verification, design development, UVM testbench design, test planning, and collaborate with systems and design engineers to optimize verification processes and coverage.

As a PHY Design Engineer/Lead at InnoPhase IoT, you will develop low-power WiFi and Bluetooth micro-architecture, participate in RTL design, analyze designs for bottlenecks, develop verification tools, and work with physical design teams. You’ll utilize your extensive experience in ASIC and FPGA development to drive innovations in wireless IoT solutions.

The Physical Design Engineer Lead will oversee the physical design implementation of low-power, high-performance SoCs, including logic synthesis, floor planning, power planning, and timing closure. Responsibilities include resolving design issues, automating processes using EDA tools, and interfacing with RTL and cross-functional teams for modifications.

The Senior Physical Design Engineer is responsible for the physical design implementation of low-power and high-performance SoC, collaborating with RTL and system design teams. Duties include logic synthesis, floor planning, power planning, place and route, and static timing closure, while also automating processes using EDA tools to enhance quality and throughput.

The Sr Staff Engineer, Digital Design Verification will implement functional verification plans, work with UVM verification environments, and evaluate verification coverage, providing gap analysis and mitigation strategies while supporting schedule and resource planning.

The Staff/Sr. Staff Engineer, RFIC Design will lead the design of custom RF, analog, and mixed signal ICs, supervising layout activities, running simulations, collaborating with cross-functional engineers, and assisting test engineers in production ramp-up. The role requires hands-on technical leadership and contributions to high-performance connectivity products.

The Staff/Sr. Staff Engineer, RF PLL Design will lead the development of custom RF, analog, and mixed signal IPs. Responsibilities include hands-on design of high-performance RF synthesizers, supervising layout activities, collaborating with cross-functional teams, and presenting findings to management. The role also involves validating methods to alleviate circuit impairments and participating in post-silicon performance characterization.

The Principal Engineer will lead the development of RF, analog, and mixed signal IPs for SoC products. Responsibilities include designing RF frequency synthesizers, supervising layout activities, collaborating with cross-functional teams, conducting simulations, and aiding in test plan design and validation.

The Principal Engineer, RFIC Design will lead and contribute to the design and development of high-performance RFICs and mixed signal IPs, oversee layout activities, and work across various teams to ensure product specifications are met, along with conducting simulations and post-silicon testing.

The Lead, ATE Test Engineering will oversee test engineering tasks for new WiFi products, define test strategies, lead hardware/software development for testing, collaborate with design teams, develop calibration algorithms, and ensure production readiness of ATE systems while optimizing test costs and performance.

The Senior Staff DFT Engineer at InnoPhase IoT will architect and support DFT for IoT products, using DFT/ATPG/MBIST tools for SOCs. Responsibilities include developing DFT plans, ensuring manufacturing quality, assisting the design team with low-power constraints, debugging, and vector generation.