Search the 22 jobs at InnoPhase IoT

The Staff Software Engineer at InnoPhase IoT will design and implement security features for IoT products, analyze and fix vulnerabilities, integrate security tools, and support customer trials. The role involves driving innovation and testing firmware in embedded systems, with a focus on security and modular designs.

The Staff Test Application Development Engineer will design and develop embedded software applications, create and execute test plans for various peripherals, debug issues in software and hardware interfaces, validate system-level performance, and document testing processes. The role emphasizes collaboration with hardware teams and continuous improvement of testing practices.

As a PHY Verification Engineer, you will design and develop UVM testbenches for wireless PHY layers and work collaboratively with design and system engineers to identify and resolve verification bottlenecks.

The Software Tech Lead at InnoPhase IoT designs and develops firmware/software for embedded targets, conducts code reviews, mentors junior members, and collaborates closely with project management. The role requires strong expertise in C programming and knowledge of wireless specifications, microcontrollers, and project management tools, while actively contributing to IoT solutions in various domains.

The Senior Software Test & Automation Engineer designs, develops, and executes test software solutions for WiFi SOC and radio debug and automated test solutions specifically for the IoT market. Responsibilities include collaborating with various teams, developing test cases and documentation, and creating debug tools, ensuring high-quality outputs and effective communication within multi-functional teams.

The Sr Staff Engineer, Digital Design Verification will implement functional verification plans, work with UVM verification environments, and evaluate verification coverage, providing gap analysis and mitigation strategies while supporting schedule and resource planning.

Lead the physical design implementation of low-power and high-performance SoC in advanced technology nodes. Collaborate with RTL and System design teams, automate workflows, and drive tool improvements. Bachelor's degree in Electrical Engineering required.

Design and execute physical design implementation of low-power and high-performance SoC in advanced technology nodes. Responsible for logic synthesis, floor planning, power planning, place & route, timing closure, and physical verification. Collaborate with cross-functional teams and vendors to drive design modifications and enhance automation.

The Physical Design Engineer Lead will design and execute physical design implementations for low-power, high-performance SoCs. Responsibilities include working with RTL and system design teams, resolving design issues, delivering specifications, and automating processes using EDA tools.

As a WiFi MAC Design Engineer/Lead, you will focus on low-power WiFi and Bluetooth micro-architecture and design. Responsibilities include refining WiFi LMAC architecture, developing SystemVerilog RTL, identifying and addressing design bottlenecks, and collaborating with verification teams on test plans and coverage analysis.

The Principal Engineer will lead the development of integrated custom analog and mixed signal IPs, focusing on high-performance ADC design. Responsibilities include supervising design teams, conducting layout activities, performing simulations, and collaborating with cross-functional engineers to meet product specifications and ensure quality.

As a Senior ASIC Design Engineer at InnoPhase IoT, you will develop Low-power WiFi and BT/BLE RTL designs, execute synthesis and timing closure, and enhance ASIC development via scripting. Collaboration with RTL and Physical Design teams is crucial throughout the product development cycle.

The Principal/Sr. Staff Digital Design Engineer will lead the design and verification of SoC products, contribute to specifications, and collaborate with cross-functional teams. Responsibilities include front-to-back digital design, technical leadership, debugging, and support for diverse teams. The role emphasizes high-quality digital solutions and mentorship.

The PHY Design Engineer will design low-power communication systems and develop micro-architecture and SystemVerilog RTL. Responsibilities include collaborating on product specifications, design verification, identifying bottlenecks, and providing guidance to teams on physical design and timing closure.

The Principal Software Engineer will design, develop, and lead the architecture of embedded wireless firmware for IoT products, focusing on ULP solutions. Responsibilities include developing drivers, collaborating with a global team, and ensuring timely delivery of high-quality products.

The Principal PHY/MAC RTL Design Engineer will be responsible for implementing MAC and PHY algorithms for low power IoT connectivity devices, developing specifications, creating micro-architecture in Verilog/Systemverilog, verifying designs, and collaborating with cross-functional teams.

The Staff/Sr. Staff Engineer, RFIC Design will lead the design of custom RF, analog, and mixed signal ICs, supervising layout activities, running simulations, collaborating with cross-functional engineers, and assisting test engineers in production ramp-up. The role requires hands-on technical leadership and contributions to high-performance connectivity products.

The Staff/Sr. Staff Engineer, RF PLL Design will lead the development of custom RF, analog, and mixed signal IPs. Responsibilities include hands-on design of high-performance RF synthesizers, supervising layout activities, collaborating with cross-functional teams, and presenting findings to management. The role also involves validating methods to alleviate circuit impairments and participating in post-silicon performance characterization.

As a PHY Verification Engineer/Lead at InnoPhase IoT, you will define and develop UVM testbenches for wireless PHY and MAC layers, collaborating with design and system engineers. Responsibilities include optimizing test plans, conducting verification coverage analysis, running regressions, and refining verification tools. Your role also involves debugging and problem-solving in a team environment.

The Principal Engineer will lead the development of RF, analog, and mixed signal IPs for SoC products. Responsibilities include designing RF frequency synthesizers, supervising layout activities, collaborating with cross-functional teams, conducting simulations, and aiding in test plan design and validation.