Join a team of experts as a Static Timing Analysis Engineer, focusing on the physical design of large-scale semiconductor products. Responsibilities include performing STA, specifying timing ECOs, and driving timing closure methodologies. Candidate should have experience with high-speed networking products.

As a Physical Design Engineer, you will work on the full lifecycle of chip development, from CAD tool flow setup to execution of physical implementation, including floorplan, power delivery, and verification, while collaborating with architects and foundry partners.

As a Hardware Board/System Design Engineer, you'll design innovative board and system solutions for next-gen distributed computing systems, covering all aspects from schematic capture to system bringup. The role involves collaborating with partners, maintaining hardware systems, and providing support for early customer adoption through technical collateral.

The Principal Customer Engineer will support technical pre-sales activities, handle customer interaction, and collaborate with engineering teams to deploy solutions at scale. Responsibilities include troubleshooting, developing engineering collateral, and providing post-deployment support. The candidate should possess advanced knowledge in networking technologies and have experience in large scale data center deployments.

As a Rust Firmware Engineer, you will design and maintain firmware for custom PCBs, develop drivers for hardware components, work with Linux systems, troubleshoot integration issues, and document your work. Collaboration with hardware engineers is key for seamless performance and effective solutions.

The role involves writing test plans, developing software to validate high-speed I/O subsystems, and creating verification libraries for GPU and storage components. Candidates should have a strong coding background and experience with networking protocols, ML workloads, and Linux systems. Debugging and assisting team members with test software development are also key responsibilities.

As an RTL design engineer, you'll own the design process from analysis to RTL implementation, ensuring high-performance designs meet timing and power requirements. Collaborate with system software experts for performance validation, and support functional verification and silicon testing.

As a Hardware Emulation Engineer, you will build and maintain emulation frameworks for large-scale networking chips, improve emulation methodologies, collaborate with cross-functional teams, and validate chip designs pre-silicon. You will also be involved in CI/CD processes and tool maintenance.

As a Hardware Emulation Engineer, you will develop and maintain emulation frameworks for networking and computing chips, enhancing methodologies for testing and validation. You will collaborate with cross-functional teams to solve design issues using emulation platforms, writing scripts and handling emulation infrastructure while ensuring robust, scalable solutions for next-generation distributed systems.

As a Test Development Lead, you will develop test plans and solutions for ACF-S silicon, design ATE hardware, implement testing methodologies, ensure signal integrity, and collaborate with multiple teams to guarantee high-quality products while bridging gaps in manufacturing tests.

The Senior Hardware Engineer will design and implement high-performance hardware platforms for ASICs, produce design specifications, and conduct detailed testing and debugging. Responsibilities include collaborating with software and ASIC teams, ensuring standards compliance, and performing system characterization.

As a Physical Design Engineer, you'll engage in the full chip development lifecycle, from CAD tool flow setup and floorplan exploration to physical verification and tapeout. Collaborating across teams, you'll establish major physical structures, execute implementation tasks, and liaise with foundry partners on process and IP integration.

As a DFT Engineer, you will implement advanced designs in test access mechanisms and BIST for networking and computing chips, collaborating with various teams to integrate solutions, validate timing constraints, and develop methodologies for next-generation products.

As an Infrastructure Software Engineer, you will design, implement, and maintain infrastructure solutions for a groundbreaking product in distributed computing. The role involves collaboration with hardware and software teams, management of cloud and on-prem solutions, troubleshooting infrastructure issues, and participating in code reviews.

As a Chip Engineering Lead at Enfabrica, you will be responsible for the full chip development lifecycle, from architecture to production release. You will lead cross-functional teams, optimize silicon design, and ensure timely delivery while meeting technical and commercial requirements. Collaboration with customers and technical innovation in silicon design will be key components of this role.

The Lead Silicon Architect will define architecture and specifications for next generation Accelerated Compute Fabric chips, working closely with the silicon team on chip design, performance metrics, and verification plans. This role involves strategic leadership, driving the silicon technology roadmap, managing ASIC architecture, and ensuring successful product delivery in a competitive market.

The Design Verification Engineer will collaborate with experts to design and verify complex chip components, implement verification strategies, and develop infrastructure for hardware/software co-simulation, ensuring performance and scalability in advanced computing systems.

Develop and enhance a Rust-based software stack for ARM embedded systems, collaborating with hardware and firmware engineers. Focus on scalability, reliability, security, and designing a distributed system to manage hardware resources. Responsibilities include system programming, Linux kernel development, and embedding systems software for efficient semiconductor and networking solutions.

The Embedded Firmware Software Engineer will design, develop, and maintain low-level firmware for custom PCBs while collaborating with hardware engineers. Responsibilities include optimizing drivers for hardware components, working with Linux systems to develop kernel drivers, debugging issues, and maintaining documentation. The role requires strong programming skills in Rust, C, and C++, along with knowledge of Linux operating systems.

The Senior Infrastructure Engineer will enhance the developer experience within a monorepo environment by designing and automating build pipelines, maintaining the Bazel and Buildbarn systems, and collaborating on the internal HPC batch system. Responsibilities include mentoring team members, improving release processes, and being on call as needed.