The Senior Digital Design Engineer will develop and optimize digital designs for Ethernet IPs, ensuring compliance with standards and collaborating with various teams.

As a chip lead, you will develop micro-architecture specifications for chiplet-based systems, collaborating with cross-functional teams to define chip functionality and oversee execution.

As a Staff DFT Engineer, you will define DFT strategies, implement features in RTL, and collaborate with cross-functional teams to ensure test coverage in chiplet designs.

Lead semiconductor program management focusing on ASIC development, overseeing project phases, coordinating teams, managing budgets, and improving processes.

The Staff Digital Verification Engineer develops verification plans and test cases for chiplet technologies while leading junior engineers in a dynamic startup environment.

The role involves working with various teams to deliver solutions for high-speed interfaces, ensuring customer satisfaction and product quality.

The role involves developing verification plans and test environments for Ethernet IPs, maintaining regression environments, and collaborating with design teams to ensure quality and compliance with standards.

As a Signal and Power Integrity Engineer, you will design and optimize packaging solutions for chiplet interconnects, working closely with cross-functional teams and using various simulation tools and lab equipment.

The Hardware Board Designer will create complex PCBs for chiplet products, design power systems, and ensure product manufacturability while collaborating with a cross-functional team.