Search the 70 jobs at Alphawave IP, Inc.

As a Legal Counsel at Alphawave Semi, you'll draft and negotiate commercial agreements, ensure compliance with regulations, provide legal and business advice, and manage external counsel relationships. The role involves working on agreements related to technology and semiconductor products while collaborating across multiple teams.

As a Senior Engineer I at Alphawave Semi, you will lead DFT methodology development, create automated verification test benches, and architect end-to-end verification solutions. You are responsible for scan insertion flows, timing constraints, and managing DFT engineers while contributing to innovative designs in the data communication field.

The Senior Program Manager will lead customer and vendor communications for critical IP programs. Responsibilities include coordinating project status updates, addressing technical inquiries, tracking issues, ensuring project delivery goals are met, and driving internal processes for effective project execution.

The Engineer II - DFT will develop design flows for DFT methodologies, architect verification solutions, perform automated checks, and oversee the training and management of DFT engineers. This role involves working across multiple departments to ensure quality in complex SoC designs.

As an IP Application Engineer at Alphawave Semi, you will provide technical support for Ethernet, PCIe, and HBM IPs, assisting customers with integration and silicon bring-up. You will collaborate with R&D and maintain APIs while resolving customer issues through simulation and physical integration.

The Senior Engineer II - Analog Layout will lead layout design activities, produce high-quality IPs/AMS blocks/macros, and oversee various design and verification tasks. Responsibilities include mentoring junior engineers and driving the layout process using various tools and techniques in a hybrid work environment.

The Senior Engineer will engage in hands-on physical design and verification of ASIC projects, managing development flows, performing tasks like floor-planning and timing closure. Responsibilities also include mentoring junior team members and ensuring IP integration in designs.

As a Senior Verification Engineer, you will develop test environments at both block and cluster levels, create test plans, and collaborate with design and algorithm teams, using SystemVerilog UVM and Formal verification environments.

The Senior Engineer II will conduct EM and IR analysis of Power Delivery Networks and Standard Cell designs, focusing on mitigating voltage drop issues. Responsibilities include analyzing reports, recommending layout changes, and developing automation scripts. Collaboration with various teams is essential for successful design convergence.

The Design Engineer will work with the Architecture team to define modules, design and implement micro-architecture, collaborate with verification and PD teams, optimize designs for power consumption, and perform QA checks on advanced high-speed chips.

The Senior Engineer in Physical Design will perform hands-on physical design and verification tasks for ASIC development, manage flows, ensure proper integration of IP, and mentor junior team members. Responsibilities involve complex design tasks like floor-planning and timing closure, alongside running physical verification for DRC and LVS checks.

The Staff Engineer in Physical Design will perform hands-on physical design and verification tasks for ASIC projects, focusing on advanced process nodes. Responsibilities include managing ASIC development flows, conducting physical design tasks like floor-planning and timing closure, and verifying designs using DRC and LVS. The role also involves mentoring junior team members and ensuring IP and pad-ring integration.

The Design Verification Engineer will own the verification of new customer features, including designing verification plans, building testbenches, and analyzing test failures. They will facilitate compliance testing, support post-silicon validation, and collaborate with cross-functional teams to improve verification methodologies.

The Principal Engineer - SOC Verification is responsible for verifying IP, Block, or Subsystem at SoC Level, developing and owning the verification environment, and generating necessary documentation. The role requires an understanding of the verification flow, experience with digital verification aspects, and proficiency in various protocols and scripting languages.

Responsible for the verification of IP, Block, or Subsystem at SoC Level, including generating documentation, debugging, and developing verification environments. Requires expertise in digital verification methodologies and protocols.

In this role, you will lead the verification process of IP and subsystems, developing necessary mechanism for monitoring and coding tests. You will analyze coverage reports, support debugging of failures, and write or modify scripts using Python or Shell.

As a Senior Staff Engineer I, you will develop DFT methodologies and flows, lead and mentor DFT engineers, and collaborate on complex SoC designs. Responsibilities include architecting verification solutions, implementing DFT standards, and conducting timing checks. You will ensure high-quality implementations and manage the DFT project lifecycle.

As a Principal IC Failure Analysis Engineer, you will perform failure analysis to identify root causes of electronic component issues, work collaboratively with engineering teams, support product development, and drive improvements in product yield and reliability through advanced analytical techniques.

The Senior IP Application Engineer will work with design engineers to validate customer-designed SoCs with the company's IPs, drive technical communication, diagnose and resolve issues during integration and simulation, and author documentation to support customer product integration. This role includes managing a team of solution engineers and may require occasional travel.

As a Senior Engineer I at Alphawave Semi, you will lead IP and subsystem verification, develop monitoring mechanisms, and create testing environments. You will also manage regression tests and debug failures while modifying scripts in Python and Shell.