System Signal/Power Integrity Engineer

Posted 14 Days Ago
Be an Early Applicant
2 Locations
141K-225K Annually
Senior level
Semiconductor
The Role
The System Signal/Power Integrity Engineer will support high data rate SerDes applications, conduct system-level design, collaborate on projects, and perform simulations and measurements.
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Job Description:

System Signal/Power Integrity Engineer

Responsibilities

  • Support high data rate SerDes applications - up to 112Gbps NRZ and 224G PAM4 systems

  • System level Signal and Power Integrity design trade-offs and debug

  • Collaborate with package, PCB, and silicon designers to complete measurement-simulation correlation projects

  • Develop models with electromagnetic field solvers: primarily with Ansys HFSS and electronic suite.

  • Ability to understand laminate design and fabrication techniques and limitations for both package and PCB designs.

  • Evaluate system, PCB and package material and connector solutions for future designs.

  • Simulate schematic models and environments within Keysight ADS.

  • Ensure and know trade-offs for the accuracy of models (3D/2.5D/2D) used for design simulations.

  • Perform and develop VNA/TDR (50GHz+) measurement techniques and correlate with models and simulations.

  • Provide feedback and learnings from measurement-simulation correlation investigations to improve best practices for modeling and simulations.

  • Capture high fidelity lab measurements to be used for correlation and debug purposes

    • Experience with sampling and real-time oscilloscopes, spectrum analyzers, and optical oscilloscopes.

Understand and apply:

  • High speed data communications

  • Transmission-line and electromagnetic-field theory

  • Numerical analysis

  • VNA/TDR measurements

  • Bit-by-bit and Statistical simulators for serial data (SerDes) links

  • Insertion loss, return loss, crosstalk, BER, jitter, and statistical eye diagrams

  • Work in either time domain or frequency domain

  • Phase noise analysis as it applies to PLL’s, reference clocks, SerDes TX-RX links

  • Jitter sensitivity measurement and analysis for SerDes IP

  • Organize and manage multiple projects

  • Develop, clearly and effectively document, and track project plans

  • Effectively communicate complex concepts in conversation, presentations and written documents

  • Determine and document applicable requirements for ASIC package and PCB designs, drawing from industry standards, customer requirements, and/or APD Broadcom’s internal performance goals

  • Collaborate with Package and PCB Engineers to fulfill System SI requirements, while balancing objectives (reliability, cost, complexity, etc.)

  • Pre-layout and post-layout modeling and simulation to support package and PCB engineering for signal integrity

  • Document and deliver SI models with supporting documentation to customer and internal engineers

  • Support customer analysis and debug efforts related to our deliverables

  • Understanding of optical/electrical engine concepts and theory of operation, CWDM, OMA, etc..

  • Familiarity with optical channel impairments such as chromatic dispersion (CD) and four-wave mixing (FWM).

  • Power Integrity Concepts:  PDN impedance analysis and design, ultra-low impedance measurements, understanding of SMT capacitor performance metrics, use of CPA and/or SI-Wave for PDN simulations.

 

Qualifications

  • BS +8yrs, MS +6 yrs or PhD +3yrs Electrical Engineering or Physics and  years experience in one or more of:

    • Signal integrity for high-speed digital applications

    • Electromagnetic transmission line theory

    • Microwave theory

    • Numerical Field solver theory

    • Power integrity

    • IC package design

    • Photonics

Tools

  • EM modeling (Ansys HFSS/SIWave/Q3D and Polar)

  • Circuit simulation tools (Keysight ADS)

  • Matlab (desired)

  • Cadence APD/Allegro (desired)

  • Other layout tools (desired)

  • Linux (desired)

  • Keysight AEL (desired)

  • Perl (desired)

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $141,000- $225,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Top Skills

Allegro
Ansys Hfss
Cadence Apd
Em Modeling
Keysight Ads
Linux
Matlab
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The Company
HQ: San Jose, CA
38,985 Employees
On-site Workplace
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs,
develops and supplies semiconductor and infrastructure software solutions.

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