Staff/Sr. Staff Semiconductor Process Engineer, Integration

Staff/Sr. Staff Engineer, Process

Pacific Biosciences is seeking an experienced, highly motivated semiconductor process integration engineer to join the SMRT cell NPI team to work on current and next generation products. This opportunity involves working as part of a highly diverse, multi-disciplinary team to develop complex electrically, optically, and biologically integrated semiconductor chip sequencing technologies.

The ideal candidate is a very independent thinker and self-starter who works great in a team setting as well as on individual projects. A broad knowledge of semiconductor fabrication, integration approaches and schemes, and backend packaging interactions is essential. This person will work very closely with external foundries and represent the company for specific product lines and, once conditions allow, be expected to travel as-needed to foundry partners.

The candidate must have an appetite for solving complex problems requiring holistic evaluation of process/product factors and actively seek opportunities for process improvement based on statistically meaningful, data-driven conclusions. Software and database experience and advanced data analysis skills are also highly desirable.

The candidate will be responsible for ensuring that high quality products are delivered from external semiconductor foundry partners. Their primary focus will be partnering with foundries, manufacturing, and R&D to execute new and continuing yield improvement projects associated with semiconductor wafer fabrication and product integration.

Project Responsibilities Include:

• Interfacing with external foundries for customized semiconductor wafer fabrication from R&D to high volume manufacturing.
• Working with R&D, QA, manufacturing, and supply chain to drive execution of long-term engineering projects
• Ownership of new product transfer activities from R&D to manufacturing. Coordinating with manufacturing and R&D to define process transfer deliverables and qualification acceptance criteria enabling successful process/product transfer to production and volume ramp.
• Provide Design for Manufacturability inputs early in the product development cycle.
• Development and execution of statistical experiments to evaluate inline process changes and demonstrate their effects on device functional performance.
• Definition of manufacturing infrastructure (SPC charts, workflows, work instructions, etc.) required to support production.
• Analysis of process monitor, QC, and field data to understand and identify process drift, increases in defectivity and yield loss, and sources of performance variation.
• Define and execute CIP projects to effect positive change in cost/quality/cycle time/functional performance.
• Define rework processes and backup/redundancy systems.
• Partner with manufacturing to support production.
• Conducting regular wafer or chip failure analysis.

Required Qualifications:

• Typically requires a minimum of 7-10 years of related experience with a Bachelor’s degree; or a minimum of 5-8 years with a Master’s or PhD degree 
• A degree in Materials Science, Electrical Engineering, Chemical Engineering, or Physics
• 5+ years of industry experience in wafer fabrication, product transfer, and high-volume manufacturing ramp.
• 3+ years of FEOL semiconductor integration experience involving advanced manufacturing processes and/or novel materials and process techniques
• Experience with MES/manufacturing automation systems
• Experience with Design for Manufacturability (DFM) and statistical analysis 
• Familiarity with a variety of FA/Metrology techniques (SEM, FIB, TEM, EDX, EELS, XPS, TOFSIMS, Hot spot, bright field and dark field imaging)
• Knowledge of ISO 9001 & ISO 13485 QMS
• Proficiency with JMP, MS Office Suite of programs, SolidWorks, and data mining ability
• Strong sense of ownership and drive for success
• Strong communication and documentation skills including qualification plans/reports, specifications, procedures, work instructions, and technician training
• Excellent interpersonal, written, and verbal communication skills.
• Ability to travel up 15% of the time 

Preferred Qualifications:

• Experience in managing and interfacing with semiconductor foundries preferred
• Experience in 300 mm wafer fabrication preferred
• Experience in CMOS image sensor or photonic wafer fabrication preferred
• Working knowledge in Multivariate experimental design and Analysis preferred

Non-Field Based Employees are required to be onsite Monday-Thursday (Friday work from home).  Depending on the role, some employees may be required to be 100% onsite.

You may be required from time to time to visit and work at PacBio locations and for such times as the Company considers necessary for the proper performance of your duties.

All listed tasks and responsibilities are deemed as essential functions to this position; however, business conditions may require reasonable accommodations for additional tasks and responsibilities.

All qualified applicants will receive consideration for employment without regard to race, sex, color, religion, national origin, protected veteran status, or on the basis of disability, gender identity, and sexual orientation.

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Salary Range:

$148,200.00 - $222,200.00

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All qualified applicants will receive consideration for employment without regard to race, sex, color, religion, national origin, protected veteran status, or on the basis of disability, gender identity, and sexual orientation.

If you are an individual with a disability and require a reasonable accommodation to complete any part of the application process, or are limited in the ability or unable to access or use this online application process and need an alternative method for applying, you may contact us at 650-521-8000, or [email protected] for assistance.

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