Sr Engineer Device Engineering

Sr Engineer Device Engineering

Essex Junction, VT

About GlobalFoundries:

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Summary of Role:

Develop ESD and Latch up protection device/circuit solutions for differentiated technology portfolio.

Essential Responsibilities:

Develop ESD and Latch up protection device/circuit solutions for differentiated technology portfolio. Design test macros for electrical characterization and JEDEC qualification. Define test plans and execute qualification plans per industry standards. Analyze electrical test data, develop ESD/ Latch-up-related physical ground rules and develop supporting documentation, such as user guides and application notes. Submit and track failure analysis samples to understand observed failure and defect modes. Ensure correct process monitors are in place for robust ESD/Latch-up manufacturing. Collaborate closely with Quality, Reliability, and Technology teams for technology qualification. Work with circuit IO Design Teams to cooptimize I/O and ESD performance.

Other Responsibilities:

· Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements, and programs.

Required Qualifications:

· Education – Master’s degree, or foreign equivalent, in Electrical Engineering or closely related field of study.

· Experience – 2 years of post-baccalaureate experience in the job offered, as an Engineer, or a similar occupation. Must have 2 years of experience in: (1) silicon process technology development and semiconductor device design; (2) Electronic Design Automation [EDA] tools; (3) Design of experiments for process/technology definition and optimization; (4) Data analysis tools (JMP) and data mining; (5) implementing CIPs for critical parameters; (6) Manufacturing systems for lot processing and disposition (SiView, Experiment Management System); (7) Semiconductor process fabrication flow. Less than 10% travel required, domestic/international.

Salary range: $105,477 – $115,500

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If you need a reasonable accommodation for any part of the employment process, please contact us by email at [email protected] and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

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Expected Salary Range

Salary range: $105,477 – $115,500

The exact Salary will be determined based on qualifications, experience and location.