SoC - Chiplet Design Lead

The SoC Chiplet Design Lead will be responsible for leading the design and development of complex System-on-Chip (SoC) architectures. This role requires a deep understanding of SoC design principles, strong leadership skills, and the ability to drive cross-functional teams towards successful project completion.

This role could be hybrid based out of Toronto, Ottawa,  Boston, Austin, Santa Clara as well as remote in North America on a case by case basis.

Key Responsibilities:

• Lead the end-to-end development of SoC chiplet designs, from concept to tape-out.
• Work with the architecture, systems and packaging teams to explore tradeoffs around performance, power, features and cost
• Oversee and contribute to RTL design, DFT architecture, SoC verification, synthesis, and timing closure.
• Collaborate with software, hardware, verification and PnR teams to ensure seamless integration and functionality.
• Conduct design reviews and provide technical guidance to the design team.
• Work closely with the project management team to define project timelines and deliverables.
• Manage external vendors and IP providers to integrate third-party components into the SoC.
• Stay current with industry trends and advancements to ensure our SoC designs remain cutting-edge.
• Mentor and develop junior engineers, fostering a culture of continuous learning and improvement.

Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 8+ years of experience in SoC design and development.
• Proven track record of leading successful SoC projects from concept to volume production.
• Strong expertise in RTL design using Verilog or SystemVerilog
• Proficient in SoC verification methodologies and tools (UVM, SystemVerilog, C/C++, Coco-TB, etc.).
• Experience with synthesis, place-and-route, and timing analysis.
• Familiarity with Design-for-Test and Design-for-Debug ideas and architecture
• Familiarity with embedded software development and hardware/software co-design.
• Excellent problem-solving skills and attention to detail.
• Strong communication and leadership skills, with the ability to work effectively in a team environment.

Preferred Qualifications:

• Experience with advanced process nodes (e.g., 7nm, 5nm).
• Knowledge of low-power design techniques.
• Experience with high-speed interface design (PCIe, UCIe, DDR, Ethernet, etc.).
• Familiarity with EDA tools from vendors such as Synopsys, Cadence, or Mentor Graphics.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government.

Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process.

If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.