Senior Memory Circuit Design Engineer

Posted Yesterday
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Mendota Heights, MN
91K-146K Annually
Senior level
Semiconductor
The Role
The Senior Memory Circuit Design Engineer will analyze memory architectures, design memory circuits at the transistor level, simulate and verify designs, and document specifications. The role includes developing automation scripts, integrating characterization flows, and debugging silicon issues in a collaborative engineering environment.
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Job Description:

Senior Memory Circuit Design Engineer

 

We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the development of memory compilers and custom macros of all types on the bleeding edge of process technology. 

 

Available Job Responsibilities

  • Analyze different memory architectures and highlight the tradeoffs

  • Design and build memory or circuit blocks at the gate or transistor level 

  • Simulate and analyze the circuit design using transistor level simulators 

  • Extract the layout and perform post-layout simulations and verification

  • Floorplan physical implementation and leafcell layout integration to build the physical macro

  • Integrate characterization flow to extract timing and power information

  • Develop scripts to automate characterization flow, simulations, and verification

  • Specify and verify various behavioral and physical memory models

  • Document the design specifications, behavioral description, and timing diagrams

  • Specify silicon test plan and correlate silicon to simulation data

  • Help debug silicon issues

Skillset Required

  • Knowledge in development of memory compilers or custom digital circuits of all types; SRAMs, Register-files, Multi-ports, ROM, etc…

  • Good understanding of transistor level circuit behavior and device physics

  • Good understanding of signal integrity, EM/IR, and reliability analysis

  • Understanding of memory behavioral and physical models

  • Understanding of DFT schemes and chip level integration

  • Familiarity with test setups, silicon testing and debug is a plus

  • Proficient in running simulators, writing automation scripts, and are tools savvy

  • Good communication, interpersonal, and leadership skills

  • Motivated, self-driven and good at multi-tasking

Qualifications

 

Requires a BS in Electrical Engineering and 5+ years of related experience

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $91,000 - $146,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Top Skills

Rom
Sram
The Company
HQ: San Jose, CA
38,985 Employees
On-site Workplace
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs,
develops and supplies semiconductor and infrastructure software solutions.

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