R&D Engineer IC Design

Posted 17 Days Ago
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San Jose, CA
141K-225K Annually
Senior level
Semiconductor
The Role
Oversee ASIC development from design to documentation, involving architecture, logic design, verification, and ensuring timing closure and power analysis.
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Job Description:

ASIC/Layout Design Engineer: Oversees definition, design, verification, and documentation for ASIC development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. May also review vendor capability to support development.      - Knowledge:  Having wide-ranging experience, uses professional concepts and company objectives to resolve complex issues in creative and effective ways. Some barriers to entry exist at this level (e.g., dept/peer review).  Level at which career may plateau.      - Job Complexity: Works on complex issues where analysis of situations or data requires an in-depth evaluation of variable factors.  Exercises judgment in selecting methods, techniques and evaluation criteria for obtaining results. Networks with key contacts outside own area of expertise.      - Supervision:  Determines methods and procedures on new assignments and may coordinate activities of other personnel (Team Lead).    

BS with 12+ years experience, or MS with 10+ years experience.

Must have strong Place and Route back ground and drive timing closure using Innovus, ICC2 in 16nm technology.

Must be have hands on experience in all phases design from RTL2GDS and Analysis - IRdrop/EM using Apache, Timing signoff using PrimeTime.

Must be fluent in tcl/perl scripting and automation.

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $141,000 - $225,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Top Skills

Apache
Asic
Icc2
Innovus
Layout Design
Perl
Primetime
Rtl2Gds
Tcl
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The Company
HQ: San Jose, CA
38,985 Employees
On-site Workplace
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs,
develops and supplies semiconductor and infrastructure software solutions.

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