Principal UVM Verification Engineer

Posted 12 Days Ago
Be an Early Applicant
12 Locations
Remote
Senior level
Hardware • Software
The Role
As a Principal Verification Engineer, you'll validate cryptographic processor designs, create verification plans, and guide best practices in a cutting-edge environment.
Summary Generated by Built In

FABRIC CRYPTOGRAPHY

Building towards a future beyond trust with custom chips for advanced cryptography. 


Fabric is a fast-growing Series A deep tech company (full-stack across silicon, hardware and cloud) that was founded to build towards a future beyond trust with custom chips for advanced cryptography. Incredible cryptographers, engineers, and builders are working tirelessly to bring this vision to life. Our job is to make their work possible at scale and at speed.


We’re a team of 60+ AI hardware and software veterans, cryptographers and cypherpunks. Together, we’re building the first general purpose, high performance computer chip for all cryptography – what we call the Verifiable Processing Unit (VPU). On top of the VPU, we’re developing a full compiler stack and acceleration libraries to ensure the chips are easy to program and use. With $39 million in equity and tens of millions worth in pre-orders, we're enabling real-time, high-performance systems where privacy is the default, not the exception.


About the job

As a Design Verification Engineer, you will be an integral part of our mission to deliver cutting-edge cryptography processors. You will work alongside a team of highly skilled professionals who are committed to pushing the boundaries of hardware innovation. Your role will involve ensuring that our cryptographic processor designs meet the highest standards of functionality, performance, and reliability.

What you'll be doing...

  • Work on verification of a proprietary cryptographic processor and SoC
  • Contribute to the architecture and methodology of our DV environment and team from scratch
  • Develop and execute verification plans and testbenches to validate the functionality of our products 
  • Write and maintain directed and constrained random tests to ensure that the verification environment is up-to-date and effective
  • Work cross functionally to integrate the verification environment into the overall design flow. 
  • Own and develop formal and UVM verification methods to ensure the completeness and consistency of the design. 
  • Provide technical guidance to other team members with the latest verification best practices and techniques. 

Qualifications and experience requirements...

  • BS, MS,  PhD in Electrical Engineering, Computer Science, or a related field. 
  • 10+ years of strong experience with design verification
  • Integration of third-party IP into an SoC
  • Experience with an SoC through tapeout and post-silicon
  • Knowledge of CDC, XProp,and DFT
  • UVM testbench development from scratch, SystemC/C++ experience a plus
  • Python knowledge and scripting/automating DV flows
  • Good understanding of digital design, including RTL design, UVM, System Verilog and synthesis. 
  • Knowledge of cryptography and data protection is a plus. 
  • Excellent written and verbal communication skills, and the ability to work effectively in a team environment.  Ability to work independently, under pressure and in a startup setting.

Fabric Cryptography is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate based on race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. 

Top Skills

C++
Python
Rtl Design
System Verilog
Systemc
Uvm
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The Company
HQ: San Francisco, CA
27 Employees
On-site Workplace

What We Do

Creating A World Beyond Trust

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