Principal DFT Engineer

Posted Yesterday
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Bangalore, Bengaluru Urban, Karnataka
Senior level
Consulting
The Role
The Principal DFT Engineer will support DFT methodology across various projects, implementing innovative techniques, evaluating tool capabilities, and coordinating with EDA vendors. Responsibilities include contributing to documentation, conducting training, and addressing customer DFT concerns while working on CPU, GPU, and ML IP.
Summary Generated by Built In

Client DFT methodology team works on DFT for projects, including soft IP, hard macros, testchips and physical library IP across all the Arm design sites. In addition, this team builds and drives DFT methodology and flows throughout all of Arm and works to get support from EDA vendors to support our methodologies.

Responsibilities:

Support DFT on multiple types of projects in multiple design centers and apply innovative DFT techniques and affect the content of forthcoming CPU, GPU, ML and systems IP, some years before they appear in mainstream products. This candidate will also contribute to DFT methodology by crafting flows, evaluating tool capabilities, helping other specialists on projects, detailing work through documentation, working with EDA vendors and propagating DFT methodologies. This position may also include meeting with customers for DFT training or to address DFT concerns.

Required Skills and Experience :

  • This role is for a Staff or Principal DFT engineer with 8 years plus experience
  • Experience with Perl, TCL, and/or C programming
  • Proficient in Unix/Linux environments
  • Some core DFT skills are considered crucial for this position including some of the following: Knowledge of at-speed testing, test insertion and test coverage assessment, test pattern development, scan compression, Memory BIST, Logic BIST, JTAG, IJTAG, fault simulation, debug, verification, designing and conducting experiments/tool evaluations.
  • Experience with Siemens, Cadence and/or Synopsys DFT tools

“Nice To Have” Skills and Experience :

  • Ability to build and deploy generic DFT flows
  • Familiarity with IEEE standards such as 1500, 1149.1, 1687 and 1838
  • Familiarity with supporting silicon into volume production
  • Knowledge of SSN and 3DIC
  • Gained some exposure to digital ASIC front and backend design & verification processes
  • Hands-on Synthesis and Static Timing Analysis (STA) experience
  • Familiarity with current mobile SOC architectures and low power design practices would be an advantage
  • Understanding of Functional Safety as it applies to DFT
  • Working knowledge of Siemens MBIST and LBIST tools

if interested please share your updated resume [email protected]
 

Top Skills

Perl,Tcl,C
The Company
Bridgewater, NJ
93 Employees
On-site Workplace
Year Founded: 2012

What We Do

Zealogics LLC provides a broad range of IT consulting, systems implementation and application outsourcing services through an optimized global delivery model. Zealogics builds deep knowledge of traditional product engineering across mechanical, electronics and software platforms, to enable clients to navigate their digital transformation.
Zealogics values engineering techniques, automation frameworks, and reference models which are refined through engagements with Fortune 500 enterprises and OEMs. We combine customer-centric product strategies through a collaborative approach for execution. We help to harmonize processes, identify bottlenecks, and eliminate non-value tasks to deliver world-class products.
With impeccable focus on client needs we connect specialized resources for the right positions, both for full time and contractual placements. Our long-term relationships with employees and clients have been built in an environment of integrity and commitment, with a shared goal of mutual success. Zealogics hires experienced people to solve a wide array of IT and Engineering challenges that our clients face. Our guarantee - Zealogics provides the best value services in town.

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