MOSFET Design Layout Engineer

As a MOSFET Design Layout Engineer; you will support the product design team to create designs and provide expert advice based upon agreed requirements and specifications. You will be expected to create a full custom layout of components and die designs. You will be responsible for ensuring the DRC has been run and reviewed, as well as supporting the mask ordering process.  

Key Tasks/Responsibilities

• Work together with product design team to generate layout of devices and components for a variety of advanced technology platforms to enhance the product, to:

• Produce high quality layout for typical discrete power semiconductor MOSFET device layouts for high voltage applications,
• Work with the design lead to lay out chip floorplan, using core P-cells and specially designed termination structures and Process Contro Monitor (PCM)

• Be able to execute proficiently all layout checks (DRC, ERC, LVS, etc.).
• Be well aware of high voltage application layout rules and termination layouts
• Maintain the DRC checks, amending rules in a controlled manner where appropriate

Other Tasks/Responsibilities

• Generate fractured data as well as layout designs,
• Carry out XOR checks on both fractured data and layout designs.
• Data fracture for mask manufacture,
• Initiate the Mask Control Order form,
• Work with frame layout team to ensure masks design is correct,
• Work with MCO Controller to ensure order forms have been correctly generated,
• Generate dxf files of finished layouts for datasheets of discrete components,
• Takes care to maintain data integrity and building layout libraries, which are used to build the layout of the products.  Makes recommendations for new procedures,
• Validate that all designs are DRC clean, XOR checked and approved prior to being sent to the mask shop.
• Delivering robust solutions to address any data prep issues and problems encounter during dry run and per-tape out to achieve Zero Data Error when releasing the final tape out and Jobdeck to vendor for mask making.

Qualifications and Education Requirements           

• Associate degree/College Diploma or BSc in computer science degree or equivalent work experience,
• At least 10 Years Experience/expertise in related experience in layout of devices in analog and power components. Preferred experience in layout of discrete components used for power trench semiconductor devices,
• Very good knowledge of Cadence tools, Mentor data structure and other layout tools. Must be very detail-oriented and thorough in generating and checking layouts with drafts and sketches provided by R&D engineers. 
• Must have good communication skills interacting with R&D engineers.
• Good skills in basic Unix commands. 
• Completes complex tasks in creative and effective ways. 
• Familiarity/expertise/exposure to script writing and programming and testing,
• Understanding of general processing techniques/concepts for silicon-based CMOS / SOI / SiC Devices and/or III-V applications a strong plus,
• Familiar and/or expert on using Unix, Linux, and Window operating systems and other scripts and Tools.

Desired Behaviours

• Proven ability to work in a dynamic environment and deliver results. Experience working in an environment requiring rapid and flawless execution under quick turnaround tasks,
• Track record of self-motivated learning,
• Strong teamwork skills and communication,
• Demonstrated ability to deliver improvements within a team environment.

What can we offer you for your talent:

Vishay offers a comprehensive suite of benefit programs including health care coverage, financial support programs and other resources designed to help you achieve your personal and professional goals. With us, you'll experience unique career paths, an open and collaborative culture, a stable business that will be there for you, and opportunities to work globally and locally.  

Do you have the skills we need? Are you ready to power your career as you power the world? If so, apply today.