IC Design Engineer

Posted 8 Days Ago
Be an Early Applicant
San Jose, CA
141K-225K Annually
Senior level
Semiconductor
The Role
The role involves designing ASIC datapaths for L2/L3 networking while collaborating with teams on microarchitecture and physical implementation.
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Job Description:

The Network Switch Group at Broadcom has brought some of the most complex and cutting-edge networking ASIC's and multichip solutions to market over the last decade. The group develops ASIC's for L2/L3 switch routing. These products support the latest networking protocols and features as well as manage extremely large volumes of traffic of the order of several Terabits/sec. These networking ASIC's support a large number of ports ranging from 10/100Mb/s to 800Gb/s speeds as well as various line interfaces and protocols and Flexible Packet Processing

.

Job Responsibility

The successful candidate will be responsible for various key tasks in the areas of uArch and RTL design of cutting-edge network switch/routing Datapath designs. The day-to-day tasks for this position include but are not limited to the following:

1). Defining in the microarchitecture and implementing design of datapath for L2/L3 Network Switching and routing ASICs and various subsystems within these chips.

2). Cooperating with other design teams on the microarchitecture definition and reviewing other Switch functions.

3). Planning Physical implementation of data-path blocks and working on initial floor plan.

4). Develop Verilog RTL. logic synthesis, physical implementation constraints, static timing analysis.

5). Work directly with the physical implementation team from initial floor planning to final timing closure.

Job Requirements:

The successful candidate will satisfy the following requirements:

1). MSEE +10 years or BSEE + 12 years or equivalent, with concentration in digital design and excellent academic standing.

2). Must have in-depth knowledge of IC technology, ASIC design flows, EDA tools and Physical design considerations.

3). Thorough knowledge of high-speed Ethernet networking and CPU I/O bus technologies.

3). Excellent knowledge of SystemVerilog. Deep experience with simulators and waveform debugging tools
4). Strong knowledge of Perl, Python, or other scripting languages.

5). Excellent verbal and written communication skills.

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $141,000  - $225,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Top Skills

Asic Design Flows
Eda Tools
Ic Technology
Perl
Python
Systemverilog
Verilog
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The Company
HQ: San Jose, CA
38,985 Employees
On-site Workplace
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs,
develops and supplies semiconductor and infrastructure software solutions.

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