ASIC Digital Physical Design Engineer

Posted 4 Days Ago
Be an Early Applicant
San Jose, CA
141K-225K Annually
Expert/Leader
Semiconductor
The Role
The ASIC Digital Physical Design Engineer will design and implement physical design methodologies, verify designs using LVS and DRC tools, and create specifications for power-grid and clock constraints. The candidate should have expertise in TSMC we 7nm-2nm processes and the ability to work in mixed-signal environments to ensure optimal performance and compliance during design tape-outs.
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Job Description:

 Qualifications include:

  • MS or PhD in Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design. 

  • Deep knowledge about industry standards in Physical Design, Physical aware synthesis, Floor-planning, CTS and place and route.

  • Experience in developing and implementing Power-grid and high speed clock constraints and specification.

  • Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip and block level.

  • Experience with CDC, static timing analysis methodologies and relevant tools.

  • Exposure to SDF annotated simulations with good understanding of parasitic delays.

  • Understanding and experience of mixed signal environments is a must.

  • Candidates must be familiar with Virtuoso, Caliber & Redhawk (power analysis) tools.

  • Good understanding of design tape-out to foundries and solid understanding of supply chain for IC Product development.

  • Must have excellent knowledge/experience with TSMC 7nm-2nm, i.e. understanding of power consumptions, area, estimated design and layout efforts for digital blocks, technology limitations.

 

Highly Desired Qualifications:

- Understanding of backend Cadence tools.

- Deep understanding of Signal Integrity and Power Integrity for High Speed designs.

- Proactive, collaborative and creative approach to innovation, technical development and consensus facilitation to influence optimal project results. 

- Excellent time and task management, and interpersonal skills.  

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $141,000 - $225,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Top Skills

Computer Engineering
Electrical Engineering
The Company
HQ: San Jose, CA
38,985 Employees
On-site Workplace
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs,
develops and supplies semiconductor and infrastructure software solutions.

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