Oversee PCB layout and design operations, manage the development of an ECAD system, and lead a team of PCB layout engineers. Ensure compliance with industry standards and collaborates with various engineering teams to optimize designs. Drive the implementation of PLM systems and develop documentation and processes for hardware design.

As an Emulation Software Engineer at Etched, you will oversee SoC bring-up on emulation platforms, develop techniques for pre-silicon validation, support emulation environments, and collaborate with cross-functional teams. You will also work on high-performance software for debugging and contribute to a hybrid emulation environment.

As an RTL Design Engineer at Etched, you'll develop and implement design verification strategies for AI chips, ensuring efficiency and correctness in ASIC designs. You'll collaborate with state-of-the-art architectures and take on crucial responsibilities for project success in a fast-paced environment.

As the first hire on our finance team, you will manage key financial operations such as pricing, accounting, and cash flow. Collaborating closely with the executive team, you will build financial infrastructure and drive strategic projects while constantly seeking process improvements and automation.

The Head of Legal will lead legal operations at Etched, focusing on commercial agreements, corporate governance, and compliance in the AI hardware sector. Key responsibilities include negotiating contracts, advising on legal matters, and providing strategic counsel to the executive team.

As a Firmware Engineer at Etched, you will develop software optimized for large transformer models, tackle challenges across the software stack, and contribute to AI solutions that can transform industries like natural language processing and generative media.

As a Front-End Power Engineer at Etched, you will optimize RTL designs for power efficiency, perform power analysis and estimation, and collaborate with the physical design team to meet power targets. You will create power models and apply techniques such as clock gating and voltage scaling to enhance digital system performance.

As a Physical Design Engineer at Etched, you will supervise the outsourcing of physical design, run design flows, and optimize tool flows while collaborating with EDA vendors. Your role includes improving CAD infrastructure and ensuring block level closure for ASIC projects.

The IC Package Engineer will drive substrate layout and package design for AI hardware, utilizing advanced packaging technologies like CoWoS and large-scale BGA designs. Responsibilities include collaboration across teams, mechanical analysis, and overseeing design validation while ensuring compliance through reliability testing.

As a Senior Firmware Engineer, you'll design software to optimize the performance of the Sohu chip, collaborate with a world-class team, solve full-stack problems, review code, and contribute to AI solutions for industries like natural language processing and generative media.

The Design Infrastructure Engineer & ECAD/MCAD Librarian at Etched will develop and maintain electronic and mechanical design infrastructure, manage ECAD and MCAD libraries, assist with PLM systems, and ensure the integration of design workflows while adhering to industry standards for quality and efficiency.

Seeking an experienced Mechanical Engineer to design high-power data center products. Responsibilities include developing mechanical designs, collaborating with design teams, managing tooling development, and ensuring compliance with manufacturing requirements.

The Senior Layout PCB Engineer will design and optimize high-speed PCBs using Cadence Allegro, focusing on 100G signaling, power distribution, and HDI stack-ups for data center products. Responsibilities include leading PCB layout projects, developing power networks, and collaborating with engineering teams for system integration to ensure performance and manufacturability.

The Machine Learning Researcher at Etched will design UI/UX for LLMs, enhance interactive demos, implement documentation systems, write tutorials, and visualize large model inference processes. Candidates should be excited about AI and possess strong communication skills and a solid mathematical background.

As an Inference Software Engineer at Etched, you will contribute to the architecture and design of a software stack for AI chips, implement efficient code, and interface with firmware teams. You will work on projects like token scheduling, inference acceleration techniques, and distributed networking for multi-server setups.

The Physical Design Power Engineer will develop chip power models, analyze power consumption, collaborate with various engineering teams, and implement techniques for power savings in ASIC designs. Responsibilities include estimating power at different levels and enhancing power efficiency through advanced methodologies.

The Reliability Engineer will be responsible for ensuring that all components and systems meet reliability standards for datacenter applications, developing and managing reliability benchmarks, reviewing supplier reports, and collaborating with teams to select components based on reliability performance.

The ECAD/MCAD Symbol Librarian at Etched will manage and maintain symbol and component libraries, create and validate PCB footprints, develop accurate 3D models in Siemens NX, and ensure integration between ECAD and MCAD workflows. Collaboration with the manufacturing team to meet DFM requirements and uphold best practices for library management is key.

As a Simulation Modeling Engineer, you will develop and own SoC functional models, collaborate with various teams to ensure performance, optimize AI workloads, and create maintainable software. You will be involved in ASIC functional modeling and performance analysis, focusing on enhancing the usability and effectiveness for partners.

The ASIC Timing Engineer at Etched will drive timing analysis and closure for their AI chips, collaborating with various teams to develop timing strategies. Responsibilities include managing timing constraints, enhancing workflows, and ensuring the performance of digital logic in ASIC designs.