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As a Senior Firmware Engineer, you'll design software to optimize the performance of the Sohu chip, collaborate with a world-class team, solve full-stack problems, review code, and contribute to AI solutions for industries like natural language processing and generative media.
As a Firmware Engineer at Etched, you will develop software optimized for large transformer models, tackle challenges across the software stack, and contribute to AI solutions that can transform industries like natural language processing and generative media.
The Core Operations role involves leading critical initiatives, facilitating leadership decision-making through data analysis, ensuring effective stakeholder communication, and driving collaboration across teams. The position requires establishing operational metrics and optimizing workflows to improve organizational performance and support the company's growth.
The Head of Legal will lead legal operations at Etched, focusing on commercial agreements, corporate governance, and compliance in the AI hardware sector. Key responsibilities include negotiating contracts, advising on legal matters, and providing strategic counsel to the executive team.
The Physical Design Power Engineer will develop chip power models, analyze power consumption, collaborate with various engineering teams, and implement techniques for power savings in ASIC designs. Responsibilities include estimating power at different levels and enhancing power efficiency through advanced methodologies.
As a Front-End Power Engineer at Etched, you will optimize RTL designs for power efficiency, perform power analysis and estimation, and collaborate with the physical design team to meet power targets. You will create power models and apply techniques such as clock gating and voltage scaling to enhance digital system performance.
As an Inference Software Engineer at Etched, you will contribute to the architecture and design of a software stack for AI chips, implement efficient code, and interface with firmware teams. You will work on projects like token scheduling, inference acceleration techniques, and distributed networking for multi-server setups.
The ASIC Timing Engineer at Etched will drive timing analysis and closure for their AI chips, collaborating with various teams to develop timing strategies. Responsibilities include managing timing constraints, enhancing workflows, and ensuring the performance of digital logic in ASIC designs.
The Design Verification Engineer will ensure the first silicon for ASICs is shippable. Responsibilities include developing test benches for various blocks and IP, ensuring efficient testing and verification processes for a focused chip model that specializes in transformer inference.
The Technical Program Manager at Etched will lead collaboration between internal teams, manage external vendor relationships, oversee project timelines, and optimize engineering processes to ensure successful delivery of AI datacenter hardware projects. Responsibilities include risk management, stakeholder communication, and continuous process improvements.
The Reliability Engineer will be responsible for ensuring that all components and systems meet reliability standards for datacenter applications, developing and managing reliability benchmarks, reviewing supplier reports, and collaborating with teams to select components based on reliability performance.
As a DRAM Engineer, you will optimize memory systems by collaborating with design and verification teams, performing DRAM simulations, validating memory integration in SoCs, managing HBM silicon testing, and developing debugging methodologies to meet high performance and reliability standards.
As an RTL Design Engineer at Etched, you'll develop and implement design verification strategies for AI chips, ensuring efficiency and correctness in ASIC designs. You'll collaborate with state-of-the-art architectures and take on crucial responsibilities for project success in a fast-paced environment.
The Procurement role at Etched involves managing vendor relationships, ensuring timely product delivery, and creating efficient systems for purchasing. Responsibilities include issuing purchase orders, negotiating contracts, evaluating suppliers, and maintaining hardware inventories.
The Principal Design Verification Engineer will develop ASIC testbenches using UVM, implement micro-architecture and maintain verification environments, execute functional verification of microchips, utilize formal verification tools, define assertions, and document the verification process while collaborating closely with design and architecture teams.
As a Physical Design Engineer at Etched, you will supervise the outsourcing of physical design, run design flows, and optimize tool flows while collaborating with EDA vendors. Your role includes improving CAD infrastructure and ensuring block level closure for ASIC projects.
The Supply Chain Manager at Etched will oversee and optimize supply chain processes for silicon wafers and server components. Responsibilities include production planning, supplier coordination, and performance monitoring. The role involves forecasting demand, generating reports, and process improvement to enhance production efficiency.
The Senior Layout PCB Engineer will design and optimize high-speed PCBs using Cadence Allegro, focusing on 100G signaling, power distribution, and HDI stack-ups for data center products. Responsibilities include leading PCB layout projects, developing power networks, and collaborating with engineering teams for system integration to ensure performance and manufacturability.