The Senior SoC Design & Integration Engineer will design, integrate, and implement SoCs focusing on high-speed interfaces and IP verification, coordinating among teams for seamless integration and post-silicon validation.

The Verification Engineer will define verification strategies, develop UVM environments, oversee test plans, ensure SoC correctness, and improve methodologies.

The Director of Photonics will lead engagements to develop Photonic Process Design Kits, manage a team of engineers, and drive next-generation product design.

The Mixed-Signal Verification Engineer will model, simulate, and validate mixed-signal ASICs, collaborate with design teams, and support silicon validation efforts.

The Senior Firmware Architect will develop firmware architecture for AI systems, collaborating on software design and implementation for high-performance communication links.

Develop and optimize low-power digital designs for ASICs and SoCs, ensuring timing closure and conducting post-silicon validation while collaborating with cross-functional teams.

Lead SoC verification strategy and execution for complex 5nm designs, collaborating with teams and establishing verification processes.

The Photonics Layout Engineer will design Silicon Photonic chips, managing the layout from planning to verification, collaborating across teams to optimize performance and processes.

The Product Engineer will develop silicon photonic devices for mass production, manage characterization and testing processes, and collaborate across teams for product reliability and qualification.

As a Principal Design Engineer, you'll architect high-performance SoC components, lead RTL design and integration, and optimize for power and performance, collaborating closely with cross-functional teams.

Develop and optimize ATE and SLT test programs for semiconductor and optical components, collaborating across teams for testing and analysis.

Seeking an experienced Package Design Engineer to develop semiconductor packages, collaborate across functions, and optimize designs for high performance and reliability.

As a Compiler Backend Engineer, design and optimize compiler functionality for ML accelerator architecture, collaborating with hardware teams to enhance performance.

The Package Reliability Engineer conducts reliability analysis, collaborates with OSATs, selects materials, leads failure analysis, and works on process and design improvements within advanced packaging.

Design and optimize DSP algorithms for high-speed communication systems, collaborate with cross-functional teams, conduct simulations, and document processes.